vendor.lattice_{ice40,ecp5}: emit Verilog as well, for debugging.

diff --git a/nmigen/vendor/lattice_ecp5.py b/nmigen/vendor/lattice_ecp5.py
index c3ca286ca7697f983d02e66b2ff6d1de0f70a4d9..c1140630fbb28c95a1061b66a3d0e41816410fbc 100644 (file)
--- a/nmigen/vendor/lattice_ecp5.py
+++ b/nmigen/vendor/lattice_ecp5.py
@@ -103,6 +103,10 @@ class LatticeECP5Platform(TemplatedPlatform):
             # {{autogenerated}}
             {{emit_rtlil()}}
         """,
+        "{{name}}.debug.v": r"""
+            /* {{autogenerated}} */
+            {{emit_debug_verilog()}}
+        """,
         "{{name}}.ys": r"""
             # {{autogenerated}}
             {% for file in platform.iter_extra_files(".v") -%}

diff --git a/nmigen/vendor/lattice_ice40.py b/nmigen/vendor/lattice_ice40.py
index 5a8d197cf5cce87485a66005109b35ae4e03d777..20a844c642304c7835318032b55eb6e0cf31459e 100644 (file)
--- a/nmigen/vendor/lattice_ice40.py
+++ b/nmigen/vendor/lattice_ice40.py
@@ -108,6 +108,10 @@ class LatticeICE40Platform(TemplatedPlatform):
             # {{autogenerated}}
             {{emit_rtlil()}}
         """,
+        "{{name}}.debug.v": r"""
+            /* {{autogenerated}} */
+            {{emit_debug_verilog()}}
+        """,
         "{{name}}.ys": r"""
             # {{autogenerated}}
             {% for file in platform.iter_extra_files(".v") -%}