ARM: Inst writing to cntrlReg registers not set as control inst

Deletion of the fact that instructions that writes to registers of type
"cntrlReg" are not set as control instruction (flag IsControl not set).

diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa
index 62684f5af058616306589406d12a26adda7dd28b..64deef044886045473f2f9e43c9c6b7c98aa6178 100644 (file)
--- a/src/arch/arm/isa/operands.isa
+++ b/src/arch/arm/isa/operands.isa
@@ -118,7 +118,7 @@ let {{
         return ('IntReg', 'uw', idx, None, srtNormal)
 
     def cntrlReg(idx, id = srtNormal, type = 'uw'):
-        return ('ControlReg', type, idx, (None, None, 'IsControl'), id)
+        return ('ControlReg', type, idx, None, id)
 
     def cntrlRegNC(idx, id = srtNormal, type = 'uw'):
         return ('ControlReg', type, idx, None, id)