This declaration should have been removed but was accidentally re-added.
It keeps m5ops_base from being passed correctly from Python to C++ when
using ARM ISA, and hence triggers gem5 crash when the guest tries to
call m5ops. This change removes it again to fix the crash.
JIRA: https://gem5.atlassian.net/browse/GEM5-658
Change-Id: I8df4ff19ecc0d64255f24dc991f71b065d2a894e
Signed-off-by: Hsuan Hsu <hsuan.hsu@mediatek.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30914
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
(cherry picked from commit
e3793fd8a9b7096a67a0f4260a36cd4dd5afe72f)
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30955
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Hsuan Hsu <kugwa2000@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
semihosting = Param.ArmSemihosting(NULL,
"Enable support for the Arm semihosting by settings this parameter")
- m5ops_base = Param.Addr(0,
- "Base of the 64KiB PA range used for memory-mapped m5ops. Set to 0 "
- "to disable.")
-
# Set to true if simulation provides a PSCI implementation
# This flag will be checked when auto-generating
# a PSCI node. A client (e.g Linux) would then be able to