Enable FP Reassociation for AMD bdver1 and bdver2 architecture

From-SVN: r199406

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0e41fc2c15cee6c2e70c3f118594e7ab99efc827..4b9e846058195f39b8dcf376fd32234d3e92607a 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2013-05-29  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>
+
+       * config/i386/i386.c (initial_ix86_tune_features): Enable
+       FP Reassociation for AMD bdver1 and bdver2.
+
 2013-05-29  Martin Jambor  <mjambor@suse.cz>
 
        * tree-cfg.c (verify_expr): Verify that BIT_FIELD_REF, REALPART_EXPR

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 20163b1a8a1bf4a56fb3a4a1d6508d401c28e0d5..a025909ccede3699fb5fdbc4dddc1198e40382c0 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2026,7 +2026,7 @@ static unsigned int initial_ix86_tune_features[X86_TUNE_LAST] = {
 
   /* X86_TUNE_REASSOC_FP_TO_PARALLEL: Try to produce parallel computations
      during reassociation of fp computation.  */
-  m_ATOM | m_HASWELL,
+  m_ATOM | m_HASWELL | m_BDVER1 | m_BDVER2,
 
   /* X86_TUNE_GENERAL_REGS_SSE_SPILL: Try to spill general regs to SSE
      regs instead of memory.  */