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Remove newline
author
Eddie Hung
<eddie@fpgeh.com>
Thu, 26 Sep 2019 17:31:55 +0000
(10:31 -0700)
committer
Eddie Hung
<eddie@fpgeh.com>
Thu, 26 Sep 2019 17:31:55 +0000
(10:31 -0700)
passes/pmgen/xilinx_dsp.cc
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diff --git
a/passes/pmgen/xilinx_dsp.cc
b/passes/pmgen/xilinx_dsp.cc
index db8fba38b2000bbd3e219ff261b521b9a6c8b292..4c297a50ae2ac6dad19efcd929d3f3c2984c600a 100644
(file)
--- a/
passes/pmgen/xilinx_dsp.cc
+++ b/
passes/pmgen/xilinx_dsp.cc
@@
-494,7
+494,6
@@
void xilinx_dsp_packC(xilinx_dsp_CREG_pm &pm)
log_debug("Analysing %s.%s for Xilinx DSP packing (CREG).\n", log_id(pm.module), log_id(st.dsp));
log_debug("ffC: %s %s %s\n", log_id(st.ffC, "--"), log_id(st.ffCcemux, "--"), log_id(st.ffCrstmux, "--"));
- log_debug("\n");
Cell *cell = st.dsp;