sv: Fix memories of typedefs

Signed-off-by: David Shah <dave@ds0.me>

diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y
index e0a654b766329c40841a29ef6d1a165514004cca..516fa4138f369f16d70663ac01ed75b6a21b94f9 100644 (file)
--- a/frontends/verilog/verilog_parser.y
+++ b/frontends/verilog/verilog_parser.y
@@ -1350,7 +1350,7 @@ wire_name:
                if ($2 != NULL) {
                        if (node->is_input || node->is_output)
                                frontend_verilog_yyerror("input/output/inout ports cannot have unpacked dimensions.");
-                       if (!astbuf2) {
+                       if (!astbuf2 && !node->is_custom_type) {
                                AstNode *rng = new AstNode(AST_RANGE);
                                rng->children.push_back(AstNode::mkconst_int(0, true));
                                rng->children.push_back(AstNode::mkconst_int(0, true));