add .gitignore to ignore the generated vhdl
authorJacob Lifshay <programmerjake@gmail.com>
Fri, 10 Dec 2021 20:30:12 +0000 (12:30 -0800)
committerJacob Lifshay <programmerjake@gmail.com>
Fri, 10 Dec 2021 20:30:12 +0000 (12:30 -0800)
openpower/isatables/.gitignore [new file with mode: 0644]

diff --git a/openpower/isatables/.gitignore b/openpower/isatables/.gitignore
new file mode 100644 (file)
index 0000000..099523f
--- /dev/null
@@ -0,0 +1 @@
+/sv_decode.vhdl
\ No newline at end of file