convert rv_sl to same extra bitwidth arg

diff --git a/riscv/insns/slli.h b/riscv/insns/slli.h
index b196afa9578995b74a0e042da297016bf029928f..515c2217d2a525364b129906003f8f0d3c728da4 100644 (file)
--- a/riscv/insns/slli.h
+++ b/riscv/insns/slli.h
@@ -1,2 +1,2 @@
 require(rv_lt(SHAMT, sv_reg_t(xlen)));
-WRITE_RD(sext_xlen(rv_sl(RS1, SHAMT)));
+WRITE_RD(sext_xlen(rv_sl(RS1, SHAMT, 64)));

diff --git a/riscv/insns/slliw.h b/riscv/insns/slliw.h
index c9495ab77edbc48766fec26d53c535f1a78145bc..87d65b7db2874413354de310ff055e17e586e3d3 100644 (file)
--- a/riscv/insns/slliw.h
+++ b/riscv/insns/slliw.h
@@ -1,2 +1,2 @@
 require_rv64;
-WRITE_RD(sext32(rv_sl(RS1, SHAMT)));
+WRITE_RD(sext32(rv_sl(RS1, SHAMT, 64)));

diff --git a/riscv/insns/sllw.h b/riscv/insns/sllw.h
index 276e285fdb43d113aac73304909da0e8328ca84d..3a764a9686d9bdcb99a154b036fb26b857f2eaba 100644 (file)
--- a/riscv/insns/sllw.h
+++ b/riscv/insns/sllw.h
@@ -1,2 +1,2 @@
 require_rv64;
-WRITE_RD(sext32(rv_sl(RS1, rv_and(RS2, sv_reg_t(0x1FU)))));
+WRITE_RD(sext32(rv_sl(RS1, RS2, 32U)));