+2001-04-12 Jim Blandy <jimb@redhat.com>
+
+ * mips.igen (CFC1, CTC1): Pass the correct register numbers to
+ PENDING_FILL. Use PENDING_SCHED directly to handle the pending
+ set of the FCSR.
+ * sim-main.h (COCIDX): Remove definition; this isn't supported by
+ PENDING_FILL, and you can get the intended effect gracefully by
+ calling PENDING_SCHED directly.
+
2001-02-23 Ben Elliston <bje@redhat.com>
* sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
if (X)
{
if (FS == 0)
- PENDING_FILL((FS + FCR0IDX),VL4_8(GPR[RT]));
+ PENDING_FILL(FCR0IDX,VL4_8(GPR[RT]));
else if (FS == 31)
- PENDING_FILL((FS + FCR31IDX),VL4_8(GPR[RT]));
+ PENDING_FILL(FCR31IDX,VL4_8(GPR[RT]));
/* else NOP */
- PENDING_FILL(COCIDX,0); /* special case */
+ PENDING_SCHED(FCSR, FCR31 & (1<<23), 1, 23);
}
else
{ /* control from */
#define Debug (REGISTERS[86])
#define DEPC (REGISTERS[87])
#define EPC (REGISTERS[88])
-#define COCIDX (LAST_EMBED_REGNUM + 2) /* special case : outside the normal range */
/* All internal state modified by signal_exception() that may need to be
rolled back for passing moment-of-exception image back to gdb. */