Fixes for MIPS_SE compiling. Regressions seem to work, but Korey should make sure...

src/cpu/o3/commit_impl.hh:
src/cpu/o3/fetch_impl.hh:
    Fixes for MIPS_SE compile.

--HG--
extra : convert_revision : fde9616f8e72b397c5ca965774172372cff53790

diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index e726797109f5f311531f495ecd860162de8aa130..43305f9625891c266c719d3909396dc0554fe1a5 100644 (file)
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -748,6 +748,7 @@ DefaultCommit<Impl>::commit()
                 }
             } else {
                 bdelay_done_seq_num = squashed_inst;
+                squash_bdelay_slot = true;
             }
 #endif
 

diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 63d22b2932dca2ab86a81c3f7ce6a1979783f290..4c378e18b6d931eb786d80afad7c31b1a8cb9279 100644 (file)
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -1139,6 +1139,8 @@ DefaultFetch<Impl>::fetch(bool &status_change)
             ext_inst = TheISA::makeExtMI(inst, fetch_PC);
 #elif THE_ISA == SPARC_ISA
             ext_inst = TheISA::makeExtMI(inst, cpu->thread[tid]->getTC());
+#elif THE_ISA == MIPS_ISA
+            ext_inst = TheISA::makeExtMI(inst, cpu->thread[tid]->getTC());
 #endif
 
             // Create a new DynInst from the instruction fetched.