+2004-08-31 Andrew Pinski <pinskia@physics.uc.edu>
+
+ * gcc.dg/rs6000-power2-1.c (t1, t2, t3, t4): Add volatile.
+ * gcc.dg/rs6000-power2-2.c: Fix the scan-assembly for the store.
+ (t1, t2, t3, t4): Add volatile.
+
2004-08-31 Mark Mitchell <mark@codesourcery.com>
* g++.dg/ext/visibility/arm1.C: New test.
if the register is a floating point one (I think this cannot
happen in real life except in this example). */
-register double t1 __asm__("r14");
-register double t2 __asm__("r15");
-register double t3 __asm__("r16"), t4 __asm__("r17");
+register volatile double t1 __asm__("r14");
+register volatile double t2 __asm__("r15");
+register volatile double t3 __asm__("r16"), t4 __asm__("r17");
void t(double *a, double *b)
{
t1 = a[-1];
/* { dg-final { scan-assembler-not "lfd" } } */
/* { dg-final { scan-assembler-not "sfd" } } */
/* { dg-final { scan-assembler "lfq" } } */
-/* { dg-final { scan-assembler "sfq" } } */
+/* { dg-final { scan-assembler "stfq" } } */
-register double t1 __asm__("fr0");
-register double t2 __asm__("fr1");
-register double t3 __asm__("fr2"), t4 __asm__("fr3");
+register volatile double t1 __asm__("fr0");
+register volatile double t2 __asm__("fr1");
+register volatile double t3 __asm__("fr2"), t4 __asm__("fr3");
void t(double *a, double *b)
{
t1 = a[-1];