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diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index dec09925a2a6690ab999cd33c619554753150240..198877b22dd01778a15ec24f6ed4b1acc8a00a23 100644 (file)
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -204,6 +204,8 @@ Fields:
 
 Examples showing how all of these Modes operate exists in the online
 [SVP64 unit tests](https://git.libre-soc.org/?p=openpower-isa.git;a=tree;f=src/openpower/decoder/isa;hb=HEAD)
+and the full pseudocode setting up all SPRs
+is in the [[openpower/isa/simplev]] page.
 
 In Indexed Mode, there are only 5 bits available to specify the GPR
 to use, out of 128 GPRs (7 bit numbering).  Therefore, only the top