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radv: adjust the DCC base VA for mipmapped color attachments
author
Samuel Pitoiset
<samuel.pitoiset@gmail.com>
Tue, 18 Jun 2019 09:51:31 +0000
(11:51 +0200)
committer
Samuel Pitoiset
<samuel.pitoiset@gmail.com>
Tue, 18 Jun 2019 10:24:26 +0000
(12:24 +0200)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
src/amd/vulkan/radv_device.c
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diff --git
a/src/amd/vulkan/radv_device.c
b/src/amd/vulkan/radv_device.c
index 1424eaef21d5a621e1a014cd6bcc28148246da29..1d59aaa0b03622fe4a3530743ab14616e32a30aa 100644
(file)
--- a/
src/amd/vulkan/radv_device.c
+++ b/
src/amd/vulkan/radv_device.c
@@
-4322,6
+4322,11
@@
radv_initialise_color_surface(struct radv_device *device,
va = radv_buffer_get_va(iview->bo) + iview->image->offset;
va += iview->image->dcc_offset;
+
+ if (radv_dcc_enabled(iview->image, iview->base_mip) &&
+ device->physical_device->rad_info.chip_class <= GFX8)
+ va += plane->surface.u.legacy.level[iview->base_mip].dcc_offset;
+
cb->cb_dcc_base = va >> 8;
cb->cb_dcc_base |= surf->tile_swizzle;