+2012-11-22 Ian Bolton <ian.bolton@arm.com>
+
+ * config/aarch64/aarch64.md (bswaphi2): New pattern.
+
2012-11-22 H.J. Lu <hongjiu.lu@intel.com>
PR sanitizer/55379
(set_attr "mode" "<MODE>")]
)
+(define_insn "bswaphi2"
+ [(set (match_operand:HI 0 "register_operand" "=r")
+ (bswap:HI (match_operand:HI 1 "register_operand" "r")))]
+ ""
+ "rev16\\t%w0, %w1"
+ [(set_attr "v8type" "rev")
+ (set_attr "mode" "HI")]
+)
+
;; -------------------------------------------------------------------
;; Floating-point intrinsics
;; -------------------------------------------------------------------
+2012-11-22 Ian Bolton <ian.bolton@arm.com>
+
+ * gcc.target/aarch64/builtin-bswap-1.c: New test.
+ * gcc.target/aarch64/builtin-bswap-2.c: New test.
+
2012-11-22 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/55432
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+/* { dg-final { scan-assembler-times "rev16\\t" 2 } } */
+
+/* rev16 */
+short
+swaps16 (short x)
+{
+ return __builtin_bswap16 (x);
+}
+
+/* rev16 */
+unsigned short
+swapu16 (unsigned short x)
+{
+ return __builtin_bswap16 (x);
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+/* { dg-final { scan-assembler-times "rev16\\t" 2 } } */
+
+/* rev16 */
+unsigned short
+swapu16_1 (unsigned short x)
+{
+ return (x << 8) | (x >> 8);
+}
+
+/* rev16 */
+unsigned short
+swapu16_2 (unsigned short x)
+{
+ return (x >> 8) | (x << 8);
+}