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[arm] Remove FPU rev field
authorRichard Earnshaw <rearnsha@arm.com>
Thu, 15 Dec 2016 15:53:50 +0000 (15:53 +0000)
committerRichard Earnshaw <rearnsha@gcc.gnu.org>
Thu, 15 Dec 2016 15:53:50 +0000 (15:53 +0000)
Similar to the main ISA, we convert the FPU revision into a set of feature
bits.  This permits a more complex set of capability relationships to be
expressed more easily.  For now we continue to use the traditional bitmasks.

* arm.h (FPU_FL_VFPv2) New feature bit.
(FPU_FL_VFPv3, FPU_FL_VFPv4, FPU_FL_VFPv5, FPU_FL_ARMv8): Likewise.
(FPU_VFPv2, FPU_VFPv3, FPU_VFPv4, FPU_VFPv5, FPU_ARMv8): New helper
macros.
(FPU_DBL, FPU_D32, FPU_NEON, FPU_CRYPTO, FPU_FP16): Likewise.
(TARGET_FPU_REV): Delete.
(TARGET_VFP3): Use feature bits.
(TARGET_VFP5): Likewise.
(TARGET_FMA): Likewise.
(TARGET_FPU_ARMV8): Likewise.
(struct arm_fpu_desc): Delete rev field.
* arm-fpus.def: Delete REV entry, use new feature bits and macros.
* arm.c (all_fpus): Delete rev field.

From-SVN: r243708

gcc/ChangeLog patch | blob | history
gcc/config/arm/arm-fpus.def patch | blob | history
gcc/config/arm/arm.c patch | blob | history
gcc/config/arm/arm.h patch | blob | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4e6be41cc04785a5a81fa0ecd57cafeaa1235c90..281eff73f8662c77081fa89acbf1b99902d1a11c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,19 @@
+2016-12-15  Richard Earnshaw  <rearnsha@arm.com>
+
+       * arm.h (FPU_FL_VFPv2) New feature bit.
+       (FPU_FL_VFPv3, FPU_FL_VFPv4, FPU_FL_VFPv5, FPU_FL_ARMv8): Likewise.
+       (FPU_VFPv2, FPU_VFPv3, FPU_VFPv4, FPU_VFPv5, FPU_ARMv8): New helper
+       macros.
+       (FPU_DBL, FPU_D32, FPU_NEON, FPU_CRYPTO, FPU_FP16): Likewise.
+       (TARGET_FPU_REV): Delete.
+       (TARGET_VFP3): Use feature bits.
+       (TARGET_VFP5): Likewise.
+       (TARGET_FMA): Likewise.
+       (TARGET_FPU_ARMV8): Likewise.
+       (struct arm_fpu_desc): Delete rev field.
+       * arm-fpus.def: Delete REV entry, use new feature bits and macros.
+       * arm.c (all_fpus): Delete rev field.
+
 2016-12-15  Richard Earnshaw  <rearnsha@arm.com>
 
        * arm.h (vfp_reg_type): Delete.
diff --git a/gcc/config/arm/arm-fpus.def b/gcc/config/arm/arm-fpus.def
index eca03bb69babfaf015e333d94a0d6285df331813..25e2ebdc3d937b6f12626367b57c2b841a7b2579 100644 (file)
--- a/gcc/config/arm/arm-fpus.def
+++ b/gcc/config/arm/arm-fpus.def
@@ -19,31 +19,31 @@
 
 /* Before using #include to read this file, define a macro:
 
-      ARM_FPU(NAME, REV, FEATURES)
+      ARM_FPU(NAME, FEATURES)
 
    The arguments are the fields of struct arm_fpu_desc.
 
    genopt.sh assumes no whitespace up to the first "," in each entry.  */
 
-ARM_FPU("vfp",                 2, FPU_FL_DBL)
-ARM_FPU("vfpv2",               2, FPU_FL_DBL)
-ARM_FPU("vfpv3",               3, FPU_FL_D32 | FPU_FL_DBL)
-ARM_FPU("vfpv3-fp16",          3, FPU_FL_D32 | FPU_FL_DBL | FPU_FL_FP16)
-ARM_FPU("vfpv3-d16",           3, FPU_FL_DBL)
-ARM_FPU("vfpv3-d16-fp16",      3, FPU_FL_DBL | FPU_FL_FP16)
-ARM_FPU("vfpv3xd",             3, FPU_FL_NONE)
-ARM_FPU("vfpv3xd-fp16",                3, FPU_FL_FP16)
-ARM_FPU("neon",                        3, FPU_FL_D32 | FPU_FL_DBL | FPU_FL_NEON)
-ARM_FPU("neon-vfpv3",          3, FPU_FL_D32 | FPU_FL_DBL | FPU_FL_NEON)
-ARM_FPU("neon-fp16",           3, FPU_FL_D32 | FPU_FL_DBL | FPU_FL_NEON | FPU_FL_FP16)
-ARM_FPU("vfpv4",               4, FPU_FL_D32 | FPU_FL_DBL | FPU_FL_FP16)
-ARM_FPU("vfpv4-d16",           4, FPU_FL_DBL | FPU_FL_FP16)
-ARM_FPU("fpv4-sp-d16",         4, FPU_FL_FP16)
-ARM_FPU("fpv5-sp-d16",         5, FPU_FL_FP16)
-ARM_FPU("fpv5-d16",            5, FPU_FL_DBL | FPU_FL_FP16)
-ARM_FPU("neon-vfpv4",          4, FPU_FL_D32 | FPU_FL_DBL | FPU_FL_NEON | FPU_FL_FP16)
-ARM_FPU("fp-armv8",            8, FPU_FL_D32 | FPU_FL_DBL | FPU_FL_FP16)
-ARM_FPU("neon-fp-armv8",       8, FPU_FL_D32 | FPU_FL_DBL | FPU_FL_NEON | FPU_FL_FP16)
-ARM_FPU("crypto-neon-fp-armv8", 8, FPU_FL_D32 | FPU_FL_DBL | FPU_FL_NEON | FPU_FL_FP16 | FPU_FL_CRYPTO)
+ARM_FPU("vfp",                 FPU_VFPv2 | FPU_DBL)
+ARM_FPU("vfpv2",               FPU_VFPv2 | FPU_DBL)
+ARM_FPU("vfpv3",               FPU_VFPv3 | FPU_D32)
+ARM_FPU("vfpv3-fp16",          FPU_VFPv3 | FPU_D32 | FPU_FP16)
+ARM_FPU("vfpv3-d16",           FPU_VFPv3 | FPU_DBL)
+ARM_FPU("vfpv3-d16-fp16",      FPU_VFPv3 | FPU_DBL | FPU_FP16)
+ARM_FPU("vfpv3xd",             FPU_VFPv3)
+ARM_FPU("vfpv3xd-fp16",                FPU_VFPv3 | FPU_FP16)
+ARM_FPU("neon",                        FPU_VFPv3 | FPU_NEON)
+ARM_FPU("neon-vfpv3",          FPU_VFPv3 | FPU_NEON)
+ARM_FPU("neon-fp16",           FPU_VFPv3 | FPU_NEON | FPU_FP16)
+ARM_FPU("vfpv4",               FPU_VFPv4 | FPU_D32 | FPU_FP16)
+ARM_FPU("vfpv4-d16",           FPU_VFPv4 | FPU_DBL | FPU_FP16)
+ARM_FPU("fpv4-sp-d16",         FPU_VFPv4 | FPU_FP16)
+ARM_FPU("fpv5-sp-d16",         FPU_VFPv5 | FPU_FP16)
+ARM_FPU("fpv5-d16",            FPU_VFPv5 | FPU_DBL | FPU_FP16)
+ARM_FPU("neon-vfpv4",          FPU_VFPv4 | FPU_NEON | FPU_FP16)
+ARM_FPU("fp-armv8",            FPU_ARMv8 | FPU_D32 | FPU_FP16)
+ARM_FPU("neon-fp-armv8",       FPU_ARMv8 | FPU_NEON | FPU_FP16)
+ARM_FPU("crypto-neon-fp-armv8", FPU_ARMv8 | FPU_CRYPTO | FPU_FP16)
 /* Compatibility aliases.  */
-ARM_FPU("vfp3",                        3, FPU_FL_D32 | FPU_FL_DBL)
+ARM_FPU("vfp3",                        FPU_VFPv3 | FPU_D32)
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 820a6abf0bc8b5a566f733e7ee63976eb451d5e1..e555cf6d08a3d3df7c6953ba1881604d16606655 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2323,8 +2323,8 @@ char arm_arch_name[] = "__ARM_ARCH_PROFILE__";
 
 const struct arm_fpu_desc all_fpus[] =
 {
-#define ARM_FPU(NAME, REV, FEATURES) \
-  { NAME, REV, FEATURES },
+#define ARM_FPU(NAME, FEATURES) \
+  { NAME, FEATURES },
 #include "arm-fpus.def"
 #undef ARM_FPU
 };
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index a412fb11e01966c2558af954fe026ae5f4cd15c0..332f0fabb0425a2b2eddeddf5ee254d991b8c0c1 100644 (file)
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -164,10 +164,10 @@ extern tree arm_fp16_type_node;
 #define TARGET_VFPD32 (TARGET_FPU_FEATURES & FPU_FL_D32)
 
 /* FPU supports VFPv3 instructions.  */
-#define TARGET_VFP3 (TARGET_FPU_REV >= 3)
+#define TARGET_VFP3 (TARGET_FPU_FEATURES & FPU_FL_VFPv3)
 
 /* FPU supports FPv5 instructions.  */
-#define TARGET_VFP5 (TARGET_FPU_REV >= 5)
+#define TARGET_VFP5 (TARGET_FPU_FEATURES & FPU_FL_VFPv5)
 
 /* FPU only supports VFP single-precision instructions.  */
 #define TARGET_VFP_SINGLE ((TARGET_FPU_FEATURES & FPU_FL_DBL) == 0)
@@ -190,10 +190,10 @@ extern tree arm_fp16_type_node;
   (TARGET_HARD_FLOAT && (TARGET_FP16 && TARGET_VFP5))
 
 /* FPU supports fused-multiply-add operations.  */
-#define TARGET_FMA (TARGET_FPU_REV >= 4)
+#define TARGET_FMA (TARGET_FPU_FEATURES & FPU_FL_VFPv4)
 
 /* FPU is ARMv8 compatible.  */
-#define TARGET_FPU_ARMV8 (TARGET_FPU_REV >= 8)
+#define TARGET_FPU_ARMV8 (TARGET_FPU_FEATURES & FPU_FL_ARMv8)
 
 /* FPU supports Crypto extensions.  */
 #define TARGET_CRYPTO                                                  \
@@ -341,18 +341,34 @@ typedef unsigned long arm_fpu_feature_set;
 #define FPU_FL_CRYPTO  (1u << 2)       /* Crypto extensions.  */
 #define FPU_FL_DBL     (1u << 3)       /* Has double precision.  */
 #define FPU_FL_D32     (1u << 4)       /* Has 32 double precision regs.  */
+#define FPU_FL_VFPv2   (1u << 5)       /* Has VFPv2 features.  */
+#define FPU_FL_VFPv3   (1u << 6)       /* Has VFPv3 extensions.  */
+#define FPU_FL_VFPv4   (1u << 7)       /* Has VFPv4 extensions.  */
+#define FPU_FL_VFPv5   (1u << 8)       /* Has VFPv5 extensions.  */
+#define FPU_FL_ARMv8   (1u << 9)       /* Has ARMv8 extensions to VFP.  */
+
+/* Some useful combinations.  */
+#define FPU_VFPv2      (FPU_FL_VFPv2)
+#define FPU_VFPv3      (FPU_VFPv2 | FPU_FL_VFPv3)
+#define FPU_VFPv4      (FPU_VFPv3 | FPU_FL_VFPv4)
+#define FPU_VFPv5      (FPU_VFPv4 | FPU_FL_VFPv5)
+#define FPU_ARMv8      (FPU_VFPv5 | FPU_FL_ARMv8)
+
+#define FPU_DBL                (FPU_FL_DBL)
+#define FPU_D32                (FPU_DBL | FPU_FL_D32)
+#define FPU_NEON       (FPU_D32 | FPU_FL_NEON)
+#define FPU_CRYPTO     (FPU_NEON | FPU_FL_CRYPTO)
+#define FPU_FP16       (FPU_FL_FP16)
 
 extern const struct arm_fpu_desc
 {
   const char *name;
-  int rev;
   arm_fpu_feature_set features;
 } all_fpus[];
 
 /* Accessors.  */
 
 #define TARGET_FPU_NAME     (all_fpus[arm_fpu_index].name)
-#define TARGET_FPU_REV      (all_fpus[arm_fpu_index].rev)
 #define TARGET_FPU_FEATURES (all_fpus[arm_fpu_index].features)
 
 /* Which floating point hardware to schedule for.  */