BEGIN_NV04(push, NV50_3D(VERTEX_BEGIN_GL), 1);
PUSH_DATA (push, prim);
- PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
nouveau_pushbuf_space(push, 8, 0, 1);
+ PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
switch (index_size) {
case 4:
#define NVC0_IB_ENTRY_1_NO_PREFETCH (1 << (31 - 8))
PUSH_REFN(push, hq->bo, NOUVEAU_BO_RD | NOUVEAU_BO_GART);
- nouveau_pushbuf_space(push, 0, 0, 1);
nouveau_pushbuf_data(push, hq->bo, hq->offset + result_offset, 4 |
NVC0_IB_ENTRY_1_NO_PREFETCH);
}
if (!targ->clean)
nvc0_hw_query_fifo_wait(push, nvc0_query(targ->pq));
+ nouveau_pushbuf_space(push, 0, 0, 1);
BEGIN_NVC0(push, NVC0_3D(TFB_BUFFER_ENABLE(b)), 5);
PUSH_DATA (push, 1);
PUSH_DATAh(push, buf->address + targ->pipe.buffer_offset);
}
while (num_instances--) {
- PUSH_SPACE(push, 8);
+ nouveau_pushbuf_space(push, 9, 0, 1);
BEGIN_NVC0(push, NVC0_3D(VERTEX_BEGIN_GL), 1);
PUSH_DATA (push, mode);
BEGIN_NVC0(push, NVC0_3D(DRAW_TFB_BASE), 1);
BEGIN_NVC0(push, NVC0_3D(CB_POS), 1);
PUSH_DATA (push, 256 + 128);
- PUSH_SPACE(push, 8);
+ nouveau_pushbuf_space(push, 8, 0, 1);
+ PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
if (info->indexed) {
assert(nvc0->idxbuf.buffer);
assert(nouveau_resource_mapped_by_gpu(nvc0->idxbuf.buffer));
}
PUSH_DATA(push, nvc0_prim_gl(info->mode));
#define NVC0_IB_ENTRY_1_NO_PREFETCH (1 << (31 - 8))
- PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
- nouveau_pushbuf_space(push, 0, 0, 1);
nouveau_pushbuf_data(push,
buf->bo, offset, NVC0_IB_ENTRY_1_NO_PREFETCH | size);
}