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diff --git a/openpower/sv/comparison_table.mdwn b/openpower/sv/comparison_table.mdwn
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 [^x2]: difficult to exactly ascertain, contains subsets. Critically depends on ISA support from earlier x86 ISA subsets (several more thousand instructions). See [SIMD ISA listing](https://www.officedaytime.com/simd512e/)
 [^r1]: [RVV Spec](https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc)
 [^r2]: RISC-V Vectors are not stand-alone, i.e. like SVE2 and AVX-512 are critically dependent on the Scalar ISA (an additional ~96 instructions for the Scalar RV64GC set, needed for Linux).
-[^r4]: Like the original Cray RVV is a truly scalable Vector ISA (Cray setvl instruction).  However, like SVE2, the Maximum Vector length is a Silicon-partner choice, which creates similar limitations that SVP64 does not have.
-    The RISC-V Founders strongly discourage efforts by programmers to find out the Silicon's Maximum Vector Length, as an effort to steer programmers towards Silicon-independent assembler. **This requires all algorithms to contain a loop construct**.
-    MAXVL in SVP64 is a Spec-hard-fixed quantity therefore loop constructs are not necessary 100% of the time.
+[^r4]: Like the original Cray RVV is a truly scalable Vector ISA (Cray
+setvl instruction).  However, like SVE2, the Maximum Vector length is a
+[Silicon-partner choice](https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#sec-vector-extensions),
+which creates similar limitations that SVP64 does not have.
+The RISC-V Founders strongly discourage efforts by programmers to
+find out the Silicon's Maximum Vector Length, as an effort to steer
+programmers towards Silicon-independent assembler. **This requires all
+algorithms to contain a loop construct**.
+MAXVL in SVP64 is a Spec-hard-fixed quantity therefore loop constructs are
+not necessary 100% of the time.
 [^r5]: like SVP64 it is up to the hardware implementor (Silicon partner) to choose whether to support 128-bit elements.
 [^s1]: [NEC SX Aurora](https://ftp.libre-soc.org/NEC_SX_Aurora_TSUBASA_VectorEngine-as-manual-v1.2.pdf) is based on the original Cray Vectors
 [^s2]: [Aurora ISA guide](https://sxauroratsubasa.sakura.ne.jp/documents/guide/pdfs/Aurora_ISA_guide.pdf) Appendix-3 11.1 p508