Jeroen Dobbelaere <jeroen.dobbelaere@acunia.com>

Jeroen Dobbelaere  <jeroen.dobbelaere@acunia.com>
* config/arm/arm.md (sign_extract_onebit, not_signextract_onebit):
Add clobber of the condition code register.

From-SVN: r57347

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 001a0c611e616ab2dad664435f0425623e75dc4e..beb2ced658a586979d25a9bee27ac6b9fe0a1dfc 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2002-09-20  Jeroen Dobbelaere  <jeroen.dobbelaere@acunia.com>
+
+       * config/arm/arm.md (sign_extract_onebit, not_signextract_onebit):
+       Add clobber of the condition code register.
+
 2002-09-20  Richard Henderson  <rth@redhat.com>
 
        * real.c (do_fix_trunc): Static.

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index a830462be20254bf698b73d4178624c603d591b8..266d0754d77c5558efe81730ef799961dc316734 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8869,7 +8869,8 @@
   [(set (match_operand:SI 0 "s_register_operand" "=r")
        (sign_extract:SI (match_operand:SI 1 "s_register_operand" "r")
                         (const_int 1)
-                        (match_operand:SI 2 "const_int_operand" "n")))]
+                        (match_operand:SI 2 "const_int_operand" "n")))
+    (clobber (reg:CC CC_REGNUM))]
   "TARGET_ARM"
   "*
     operands[2] = GEN_INT (1 << INTVAL (operands[2]));
@@ -8885,7 +8886,8 @@
        (not:SI
         (sign_extract:SI (match_operand:SI 1 "s_register_operand" "r")
                          (const_int 1)
-                         (match_operand:SI 2 "const_int_operand" "n"))))]
+                         (match_operand:SI 2 "const_int_operand" "n"))))
+   (clobber (reg:CC CC_REGNUM))]
   "TARGET_ARM"
   "*
     operands[2] = GEN_INT (1 << INTVAL (operands[2]));