Another pass at the prefetcher. Now it works with both miss and access reference...

Reworked how it is instattiated and how it communicates with other cache objects.

SConscript:
    Compile all the prefetcher files
objects/BaseCache.mpy:
    Add parameters for prefetcher

--HG--
extra : convert_revision : 2faa81c17673420ffae72a50a27e310d4c0f4135

diff --git a/SConscript b/SConscript
index 6fe99b314e6ab1abd554245675a2a6710412631c..444f71afed0142a1bb9e61fa3d0178ba3c4dd965 100644 (file)
--- a/SConscript
+++ b/SConscript
@@ -164,7 +164,10 @@ base_sources = Split('''
        mem/cache/miss/miss_queue.cc
        mem/cache/miss/mshr.cc
        mem/cache/miss/mshr_queue.cc
-        mem/cache/miss/prefetcher.cc
+        mem/cache/prefetch/base_prefetcher.cc
+        mem/cache/prefetch/prefetcher.cc
+        mem/cache/prefetch/stride_prefetcher.cc
+        mem/cache/prefetch/tagged_prefetcher.cc
        mem/cache/tags/base_tags.cc
        mem/cache/tags/cache_tags.cc
        mem/cache/tags/fa_lru.cc

diff --git a/objects/BaseCache.mpy b/objects/BaseCache.mpy
index 314a4efdae26bb90f8c92ae39e5ddeb319cd28dd..cb3e56de652a5b8e9190005798b9352237dce1e6 100644 (file)
--- a/objects/BaseCache.mpy
+++ b/objects/BaseCache.mpy
@@ -36,7 +36,12 @@ simobj BaseCache(BaseMem):
     two_queue = Param.Bool(False,
         "whether the lifo should have two queue replacement")
     write_buffers = Param.Int(8, "number of write buffers")
-    use_prefetcher = Param.Bool(False,
-         "wheter you are using the hardware prefetcher")
+    prefetch_miss = Param.Bool(False,
+         "wheter you are using the hardware prefetcher from Miss stream")
+    prefetch_access = Param.Bool(False,
+         "wheter you are using the hardware prefetcher from Access stream")
     prefetcher_size = Param.Int(100,
          "Number of entries in the harware prefetch queue")
+    prefetch_past_page = Param.Bool(False,
+         "Allow prefetches to cross virtual page boundaries")
+