info->max_shader_clock = amdinfo->max_engine_clk / 1000;
info->max_se = amdinfo->num_shader_engines;
info->max_sh_per_se = amdinfo->num_shader_arrays_per_engine;
- info->has_uvd = uvd.available_rings != 0;
+ info->has_hw_decode = uvd.available_rings != 0;
info->uvd_fw_version =
uvd.available_rings ? uvd_version : 0;
info->vce_fw_version =
bool has_dedicated_vram;
bool has_virtual_memory;
bool gfx_ib_pad_with_type2;
- bool has_uvd;
+ bool has_hw_decode;
uint32_t num_sdma_rings;
uint32_t num_compute_rings;
uint32_t uvd_fw_version;
r600_init_blit_functions(rctx);
- if (rscreen->b.info.has_uvd) {
+ if (rscreen->b.info.has_hw_decode) {
rctx->b.b.create_video_codec = r600_uvd_create_decoder;
rctx->b.b.create_video_buffer = r600_video_buffer_create;
} else {
rscreen->b.resource_from_user_memory = r600_buffer_from_user_memory;
rscreen->b.query_memory_info = r600_query_memory_info;
- if (rscreen->info.has_uvd) {
+ if (rscreen->info.has_hw_decode) {
rscreen->b.get_video_param = rvid_get_video_param;
rscreen->b.is_video_format_supported = rvid_is_format_supported;
} else {
printf("has_virtual_memory = %i\n", rscreen->info.has_virtual_memory);
printf("gfx_ib_pad_with_type2 = %i\n", rscreen->info.gfx_ib_pad_with_type2);
printf("num_sdma_rings = %i\n", rscreen->info.num_sdma_rings);
- printf("has_uvd = %i\n", rscreen->info.has_uvd);
+ printf("has_hw_decode = %i\n", rscreen->info.has_hw_decode);
printf("me_fw_version = %i\n", rscreen->info.me_fw_version);
printf("pfp_fw_version = %i\n", rscreen->info.pfp_fw_version);
printf("ce_fw_version = %i\n", rscreen->info.ce_fw_version);
si_init_cp_dma_functions(sctx);
si_init_debug_functions(sctx);
- if (sscreen->b.info.has_uvd) {
+ if (sscreen->b.info.has_hw_decode) {
sctx->b.b.create_video_codec = si_uvd_create_decoder;
sctx->b.b.create_video_buffer = si_video_buffer_create;
} else {
}
/* Check for UVD and VCE */
- ws->info.has_uvd = false;
+ ws->info.has_hw_decode = false;
ws->info.vce_fw_version = 0x00000000;
if (ws->info.drm_minor >= 32) {
uint32_t value = RADEON_CS_RING_UVD;
if (radeon_get_drm_value(ws->fd, RADEON_INFO_RING_WORKING,
"UVD Ring working", &value))
- ws->info.has_uvd = value;
+ ws->info.has_hw_decode = value;
value = RADEON_CS_RING_VCE;
if (radeon_get_drm_value(ws->fd, RADEON_INFO_RING_WORKING,