re PR target/49385 (Invalid RTL intstruction for ARM)

Fix PR target/49385

2011-06-20  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>

	PR target/49385
	* config/arm/thumb2.md (*thumb2_movhi_insn): Make sure atleast
	one of the operands is a register.

From-SVN: r175208

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 673dd46ae14e3950695e948faf2405042f67b36a..aa9449b737b1e2e99d77cc9af6efc45b4f5782ba 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2011-06-20  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>
+
+       PR target/49385
+       * config/arm/thumb2.md (*thumb2_movhi_insn): Make sure atleast
+       one of the operands is a register.
+
 2011-06-20  Kai Tietz  <ktietz@redhat.com>
 
        * fold-const.c (fold_binary_loc): Add missing

diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
index 26dcbdde83e3d689caeb2912191e3f4b33edfe43..9a11012641d6f6bd7a1b3d3d8236860372995b7b 100644 (file)
--- a/gcc/config/arm/thumb2.md
+++ b/gcc/config/arm/thumb2.md
@@ -207,7 +207,9 @@
 (define_insn "*thumb2_movhi_insn"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r")
        (match_operand:HI 1 "general_operand"      "rI,n,r,m"))]
-  "TARGET_THUMB2"
+  "TARGET_THUMB2
+  && (register_operand (operands[0], HImode)
+     || register_operand (operands[1], HImode))"
   "@
    mov%?\\t%0, %1\\t%@ movhi
    movw%?\\t%0, %L1\\t%@ movhi