techmap: Fix cell names with _TECHMAP_REPLACE_.*

Fixes #1804.

diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc
index 0c57733d41f1996a49f0df06d9bc3f28ee4abf71..10001baaae04ac6aece9831602e02148d3043d97 100644 (file)
--- a/passes/techmap/techmap.cc
+++ b/passes/techmap/techmap.cc
@@ -177,10 +177,10 @@ struct TechmapWorker
                std::string orig_cell_name;
                pool<string> extra_src_attrs = cell->get_strpool_attribute(ID(src));
 
+               orig_cell_name = cell->name.str();
                if (!flatten_mode) {
                        for (auto &it : tpl->cells_)
                                if (it.first == ID(_TECHMAP_REPLACE_)) {
-                                       orig_cell_name = cell->name.str();
                                        module->rename(cell, stringf("$techmap%d", autoidx++) + cell->name.str());
                                        break;
                                }

diff --git a/tests/techmap/techmap_replace.ys b/tests/techmap/techmap_replace.ys
index c2f42d50b197a803c9175eb5051ae9f16095c551..8403586bd4966e7f96dbbae459b1b6ec0470d273 100644 (file)
--- a/tests/techmap/techmap_replace.ys
+++ b/tests/techmap/techmap_replace.ys
@@ -16,3 +16,21 @@ EOT
 techmap -map %techmap
 select -assert-any w:s0.asdf
 select -assert-any c:s0.blah
+
+read_verilog <<EOT
+module sub(input i, output o, input j);
+wire _TECHMAP_REPLACE_.asdf = i ;
+barfoo _TECHMAP_REPLACE_.blah (i, o, j);
+endmodule
+EOT
+design -stash techmap
+
+read_verilog <<EOT
+module top(input i, output o);
+sub s0(i, o);
+endmodule
+EOT
+
+techmap -map %techmap
+select -assert-any w:s0.asdf
+select -assert-any c:s0.blah