Remove m88k support

author Alan Modra <amodra@gmail.com>

Mon, 16 Apr 2018 05:53:38 +0000 (15:23 +0930)

committer Alan Modra <amodra@gmail.com>

Mon, 16 Apr 2018 05:53:38 +0000 (15:23 +0930)
author Alan Modra <amodra@gmail.com>
Mon, 16 Apr 2018 05:53:38 +0000 (15:23 +0930)
committer Alan Modra <amodra@gmail.com>
Mon, 16 Apr 2018 05:53:38 +0000 (15:23 +0930)
diff --git a/bfd/ChangeLog b/bfd/ChangeLog

index def5b5a049726347fd945f92ad42ff20e896b63f..97461123e000de35e3ed2e3af7b287ce1aea422c 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,29 @@
+2018-04-16  Alan Modra  <amodra@gmail.com>
+
+       * Makefile.am: Remove m88k support.
+       * aoutx.h: Likewise.
+       * archures.c: Likewise.
+       * coffcode.h: Likewise.
+       * coffswap.h: Likewise.
+       * config.bfd: Likewise.
+       * configure.ac: Likewise.
+       * cpu-ns32k.c: Likewise.
+       * elf32-nds32.c: Likewise.
+       * mach-o.c: Likewise.
+       * netbsd-core.c: Likewise.
+       * reloc.c: Likewise.
+       * targets.c: Likewise.
+       * coff-m88k.c: Delete.
+       * cpu-m88k.c: Delete.
+       * elf32-m88k.c: Delete.
+       * hosts/m88kmach3.h: Delete.
+       * m88kmach3.c: Delete.
+       * m88kopenbsd.c: Delete.
+       * Makefile.in: Regenerate.
+       * bfd-in2.h: Regenerate.
+       * configure: Regenerate.
+       * po/SRC-POTFILES.in: Regenerate.
+
  2018-04-16  Alan Modra  <amodra@gmail.com>
  
         * Makefile.am: Remove i370 support.
diff --git a/bfd/Makefile.am b/bfd/Makefile.am

index 9e583df650ae54777a601b9e3f4a611f1bc74009..b9dfa98bba463a07610718377042706b3190f772 100644 (file)
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -125,7 +125,6 @@ ALL_MACHINES = \
         cpu-m9s12x.lo \
         cpu-m9s12xg.lo \
         cpu-m68k.lo \
-       cpu-m88k.lo \
         cpu-mcore.lo \
         cpu-mep.lo \
         cpu-metag.lo \
@@ -211,7 +210,6 @@ ALL_MACHINES_CFILES = \
         cpu-m9s12x.c \
         cpu-m9s12xg.c \
         cpu-m68k.c \
-       cpu-m88k.c \
         cpu-mcore.c \
         cpu-mep.c \
         cpu-metag.c \
@@ -279,7 +277,6 @@ BFD32_BACKENDS = \
         coff-go32.lo \
         coff-i386.lo \
         coff-m68k.lo \
-       coff-m88k.lo \
         coff-mips.lo \
         coff-rs6000.lo \
         coff-sh.lo \
@@ -341,7 +338,6 @@ BFD32_BACKENDS = \
         elf32-m68hc12.lo \
         elf32-m68hc1x.lo \
         elf32-m68k.lo \
-       elf32-m88k.lo \
         elf32-mcore.lo \
         elf32-mep.lo \
         elf32-metag.lo \
@@ -396,8 +392,6 @@ BFD32_BACKENDS = \
         m68k4knetbsd.lo \
         m68klinux.lo \
         m68knetbsd.lo \
-       m88kmach3.lo \
-       m88kopenbsd.lo \
         mach-o.lo \
         mach-o-i386.lo \
         mach-o-arm.lo \
@@ -460,7 +454,6 @@ BFD32_BACKENDS_CFILES = \
         coff-go32.c \
         coff-i386.c \
         coff-m68k.c \
-       coff-m88k.c \
         coff-mips.c \
         coff-rs6000.c \
         coff-sh.c \
@@ -522,7 +515,6 @@ BFD32_BACKENDS_CFILES = \
         elf32-m68hc12.c \
         elf32-m68hc1x.c \
         elf32-m68k.c \
-       elf32-m88k.c \
         elf32-mcore.c \
         elf32-mep.c \
         elf32-metag.c \
@@ -577,8 +569,6 @@ BFD32_BACKENDS_CFILES = \
         m68k4knetbsd.c \
         m68klinux.c \
         m68knetbsd.c \
-       m88kmach3.c \
-       m88kopenbsd.c \
         mach-o.c \
         mach-o-i386.c \
         mach-o-arm.c \
diff --git a/bfd/Makefile.in b/bfd/Makefile.in

index 6e89ed8ed678857f3b9bf7f612899a5b125c1e18..05ee2aaa3bcc634fd916ac97455c8f7e8cbc48e8 100644 (file)
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -458,7 +458,6 @@ ALL_MACHINES = \
         cpu-m9s12x.lo \
         cpu-m9s12xg.lo \
         cpu-m68k.lo \
-       cpu-m88k.lo \
         cpu-mcore.lo \
         cpu-mep.lo \
         cpu-metag.lo \
@@ -544,7 +543,6 @@ ALL_MACHINES_CFILES = \
         cpu-m9s12x.c \
         cpu-m9s12xg.c \
         cpu-m68k.c \
-       cpu-m88k.c \
         cpu-mcore.c \
         cpu-mep.c \
         cpu-metag.c \
@@ -613,7 +611,6 @@ BFD32_BACKENDS = \
         coff-go32.lo \
         coff-i386.lo \
         coff-m68k.lo \
-       coff-m88k.lo \
         coff-mips.lo \
         coff-rs6000.lo \
         coff-sh.lo \
@@ -675,7 +672,6 @@ BFD32_BACKENDS = \
         elf32-m68hc12.lo \
         elf32-m68hc1x.lo \
         elf32-m68k.lo \
-       elf32-m88k.lo \
         elf32-mcore.lo \
         elf32-mep.lo \
         elf32-metag.lo \
@@ -730,8 +726,6 @@ BFD32_BACKENDS = \
         m68k4knetbsd.lo \
         m68klinux.lo \
         m68knetbsd.lo \
-       m88kmach3.lo \
-       m88kopenbsd.lo \
         mach-o.lo \
         mach-o-i386.lo \
         mach-o-arm.lo \
@@ -794,7 +788,6 @@ BFD32_BACKENDS_CFILES = \
         coff-go32.c \
         coff-i386.c \
         coff-m68k.c \
-       coff-m88k.c \
         coff-mips.c \
         coff-rs6000.c \
         coff-sh.c \
@@ -856,7 +849,6 @@ BFD32_BACKENDS_CFILES = \
         elf32-m68hc12.c \
         elf32-m68hc1x.c \
         elf32-m68k.c \
-       elf32-m88k.c \
         elf32-mcore.c \
         elf32-mep.c \
         elf32-metag.c \
@@ -911,8 +903,6 @@ BFD32_BACKENDS_CFILES = \
         m68k4knetbsd.c \
         m68klinux.c \
         m68knetbsd.c \
-       m88kmach3.c \
-       m88kopenbsd.c \
         mach-o.c \
         mach-o-i386.c \
         mach-o-arm.c \
@@ -1306,7 +1296,6 @@ distclean-compile:
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-go32.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-i386.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-m68k.Plo@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-m88k.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-mips.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-rs6000.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-sh.Plo@am__quote@
@@ -1362,7 +1351,6 @@ distclean-compile:
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m68hc11.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m68hc12.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m68k.Plo@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m88k.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m9s12x.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m9s12xg.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-mcore.Plo@am__quote@
@@ -1458,7 +1446,6 @@ distclean-compile:
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m68hc12.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m68hc1x.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m68k.Plo@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m88k.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-mcore.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-mep.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-metag.Plo@am__quote@
@@ -1548,8 +1535,6 @@ distclean-compile:
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m68k4knetbsd.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m68klinux.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m68knetbsd.Plo@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m88kmach3.Plo@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m88kopenbsd.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mach-o-aarch64.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mach-o-arm.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mach-o-i386.Plo@am__quote@
diff --git a/bfd/aoutx.h b/bfd/aoutx.h

index fb1ac7db20629116a60b8e20faf44d9a2410f6d9..c43059372be534e2e133f9043ccb8cea60c71719 100644 (file)
--- a/bfd/aoutx.h
+++ b/bfd/aoutx.h
@@ -840,10 +840,6 @@ NAME (aout, machine_type) (enum bfd_architecture arch,
         arch_flags = M_CRIS;
        break;
  
-    case bfd_arch_m88k:
-      *unknown = FALSE;
-      break;
-
      default:
        arch_flags = M_UNKNOWN;
      }
diff --git a/bfd/archures.c b/bfd/archures.c

index fce2f4b63896e00b718da005c51ba66468ccb803..083d6844a6b14cfb61c5fe08e1cc1f5229602044 100644 (file)
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -220,7 +220,6 @@ DESCRIPTION
  .  bfd_arch_we32k,     {* AT&T WE32xxx.  *}
  .  bfd_arch_romp,      {* IBM ROMP PC/RT.  *}
  .  bfd_arch_convex,    {* Convex.  *}
-.  bfd_arch_m88k,      {* Motorola 88xxx.  *}
  .  bfd_arch_m98k,      {* Motorola 98xxx.  *}
  .  bfd_arch_pyramid,   {* Pyramid Technology.  *}
  .  bfd_arch_h8300,     {* Renesas H8/300 (formerly Hitachi H8/300).  *}
@@ -592,7 +591,6 @@ extern const bfd_arch_info_type bfd_m68hc12_arch;
  extern const bfd_arch_info_type bfd_m9s12x_arch;
  extern const bfd_arch_info_type bfd_m9s12xg_arch;
  extern const bfd_arch_info_type bfd_m68k_arch;
-extern const bfd_arch_info_type bfd_m88k_arch;
  extern const bfd_arch_info_type bfd_mcore_arch;
  extern const bfd_arch_info_type bfd_mep_arch;
  extern const bfd_arch_info_type bfd_metag_arch;
@@ -683,7 +681,6 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
      &bfd_m9s12x_arch,
      &bfd_m9s12xg_arch,
      &bfd_m68k_arch,
-    &bfd_m88k_arch,
      &bfd_mcore_arch,
      &bfd_mep_arch,
      &bfd_metag_arch,
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h

index 3cb11ffc130069a343dc21a42574f3474723df61..aa804d76cb8e95793d96825c8b2c3d5b2d02cf5a 100644 (file)
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -2095,7 +2095,6 @@ enum bfd_architecture
    bfd_arch_we32k,     /* AT&T WE32xxx.  */
    bfd_arch_romp,      /* IBM ROMP PC/RT.  */
    bfd_arch_convex,    /* Convex.  */
-  bfd_arch_m88k,      /* Motorola 88xxx.  */
    bfd_arch_m98k,      /* Motorola 98xxx.  */
    bfd_arch_pyramid,   /* Pyramid Technology.  */
    bfd_arch_h8300,     /* Renesas H8/300 (formerly Hitachi H8/300).  */
@@ -2609,7 +2608,7 @@ struct reloc_howto_struct
       slot of the instruction, so that a PC relative relocation can
       be made just by adding in an ordinary offset (e.g., sun3 a.out).
       Some formats leave the displacement part of an instruction
-     empty (e.g., m88k bcs); this flag signals the fact.  */
+     empty (e.g., ELF); this flag signals the fact.  */
    bfd_boolean pcrel_offset;
  };
  
diff --git a/bfd/coff-m88k.c b/bfd/coff-m88k.c

deleted file mode 100644 (file)

index 93a2d48..0000000
--- a/bfd/coff-m88k.c
+++ /dev/null
@@ -1,291 +0,0 @@
-/* BFD back-end for Motorola 88000 COFF "Binary Compatibility Standard" files.
-   Copyright (C) 1990-2018 Free Software Foundation, Inc.
-   Written by Cygnus Support.
-
-   This file is part of BFD, the Binary File Descriptor library.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-   MA 02110-1301, USA.  */
-
-#define M88 1          /* Customize various include files */
-#include "sysdep.h"
-#include "bfd.h"
-#include "libbfd.h"
-#include "coff/m88k.h"
-#include "coff/internal.h"
-#include "libcoff.h"
-
-static bfd_reloc_status_type m88k_special_reloc
-  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
-
-#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (3)
-
-#define GET_SCNHDR_NRELOC H_GET_32
-#define GET_SCNHDR_NLNNO  H_GET_32
-
-/* On coff-m88k, local labels start with '@'.  */
-
-#define coff_bfd_is_local_label_name m88k_is_local_label_name
-
-static bfd_boolean
-m88k_is_local_label_name (bfd *abfd ATTRIBUTE_UNUSED, const char *name)
-{
-  return name[0] == '@';
-}
-
-static bfd_reloc_status_type
-m88k_special_reloc (bfd *abfd,
-                   arelent *reloc_entry,
-                   asymbol *symbol,
-                   void * data,
-                   asection *input_section,
-                   bfd *output_bfd,
-                   char **error_message ATTRIBUTE_UNUSED)
-{
-  reloc_howto_type *howto = reloc_entry->howto;
-
-  switch (howto->type)
-    {
-    case R_HVRT16:
-    case R_LVRT16:
-      if (output_bfd != (bfd *) NULL)
-       {
-         /* This is a partial relocation, and we want to apply the
-            relocation to the reloc entry rather than the raw data.
-            Modify the reloc inplace to reflect what we now know.  */
-
-         reloc_entry->address += input_section->output_offset;
-       }
-      else
-       {
-         bfd_vma output_base = 0;
-         bfd_vma addr = reloc_entry->address;
-         bfd_vma x;
-         asection *reloc_target_output_section;
-         long relocation = 0;
-
-         if (! bfd_reloc_offset_in_range (howto, abfd, input_section,
-                                          reloc_entry->address
-                                          * bfd_octets_per_byte (abfd)))
-           return bfd_reloc_outofrange;
-
-         x = bfd_get_16 (abfd, (bfd_byte *) data + addr);
-
-         /* Work out which section the relocation is targeted at and the
-            initial relocation command value.  */
-
-         /* Get symbol value.  (Common symbols are special.)  */
-         if (bfd_is_com_section (symbol->section))
-           relocation = 0;
-         else
-           relocation = symbol->value;
-
-         reloc_target_output_section = symbol->section->output_section;
-
-         /* Convert input-section-relative symbol value to absolute.  */
-         if (output_bfd)
-           output_base = 0;
-         else
-           output_base = reloc_target_output_section->vma;
-
-         relocation += output_base + symbol->section->output_offset;
-
-         /* Add in supplied addend.  */
-         relocation += ((reloc_entry->addend << howto->bitsize) + x);
-
-         reloc_entry->addend = 0;
-
-         relocation >>= (bfd_vma) howto->rightshift;
-
-         /* Shift everything up to where it's going to be used */
-
-         relocation <<= (bfd_vma) howto->bitpos;
-
-         if (relocation)
-           bfd_put_16 (abfd, (bfd_vma) relocation,
-                       (unsigned char *) data + addr);
-       }
-
-      /* If we are not producing relocatable output, return an error if
-        the symbol is not defined.  */
-      if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
-       return bfd_reloc_undefined;
-
-      return bfd_reloc_ok;
-
-    default:
-      if (output_bfd != (bfd *) NULL)
-       {
-         /* This is a partial relocation, and we want to apply the
-            relocation to the reloc entry rather than the raw data.
-            Modify the reloc inplace to reflect what we now know.  */
-
-         reloc_entry->address += input_section->output_offset;
-         return bfd_reloc_ok;
-       }
-      break;
-    }
-
-  if (output_bfd == (bfd *) NULL)
-    return bfd_reloc_continue;
-
-  return bfd_reloc_ok;
-}
-
-static reloc_howto_type howto_table[] =
-{
-  HOWTO (R_PCR16L,                     /* type */
-        02,                            /* rightshift */
-        1,                             /* size (0 = byte, 1 = short, 2 = long) */
-        16,                            /* bitsize */
-        TRUE,                          /* pc_relative */
-        0,                             /* bitpos */
-        complain_overflow_signed,      /* complain_on_overflow */
-        m88k_special_reloc,            /* special_function */
-        "PCR16L",                      /* name */
-        FALSE,                         /* partial_inplace */
-        0x0000ffff,                    /* src_mask */
-        0x0000ffff,                    /* dst_mask */
-        TRUE),                         /* pcrel_offset */
-
-  HOWTO (R_PCR26L,                     /* type */
-        02,                            /* rightshift */
-        2,                             /* size (0 = byte, 1 = short, 2 = long) */
-        26,                            /* bitsize */
-        TRUE,                          /* pc_relative */
-        0,                             /* bitpos */
-        complain_overflow_signed,      /* complain_on_overflow */
-        m88k_special_reloc,            /* special_function */
-        "PCR26L",                      /* name */
-        FALSE,                         /* partial_inplace */
-        0x03ffffff,                    /* src_mask */
-        0x03ffffff,                    /* dst_mask */
-        TRUE),                         /* pcrel_offset */
-
-  HOWTO (R_VRT16,                      /* type */
-        00,                            /* rightshift */
-        1,                             /* size (0 = byte, 1 = short, 2 = long) */
-        16,                            /* bitsize */
-        FALSE,                         /* pc_relative */
-        0,                             /* bitpos */
-        complain_overflow_bitfield,    /* complain_on_overflow */
-        m88k_special_reloc,            /* special_function */
-        "VRT16",                       /* name */
-        FALSE,                         /* partial_inplace */
-        0x0000ffff,                    /* src_mask */
-        0x0000ffff,                    /* dst_mask */
-        TRUE),                         /* pcrel_offset */
-
-  HOWTO (R_HVRT16,                     /* type */
-        16,                            /* rightshift */
-        1,                             /* size (0 = byte, 1 = short, 2 = long) */
-        16,                            /* bitsize */
-        FALSE,                         /* pc_relative */
-        0,                             /* bitpos */
-        complain_overflow_dont,        /* complain_on_overflow */
-        m88k_special_reloc,            /* special_function */
-        "HVRT16",                      /* name */
-        FALSE,                         /* partial_inplace */
-        0x0000ffff,                    /* src_mask */
-        0x0000ffff,                    /* dst_mask */
-        TRUE),                         /* pcrel_offset */
-
-  HOWTO (R_LVRT16,                     /* type */
-        00,                            /* rightshift */
-        1,                             /* size (0 = byte, 1 = short, 2 = long) */
-        16,                            /* bitsize */
-        FALSE,                         /* pc_relative */
-        0,                             /* bitpos */
-        complain_overflow_dont,        /* complain_on_overflow */
-        m88k_special_reloc,            /* special_function */
-        "LVRT16",                      /* name */
-        FALSE,                         /* partial_inplace */
-        0x0000ffff,                    /* src_mask */
-        0x0000ffff,                    /* dst_mask */
-        TRUE),                         /* pcrel_offset */
-
-  HOWTO (R_VRT32,                      /* type */
-        00,                            /* rightshift */
-        2,                             /* size (0 = byte, 1 = short, 2 = long) */
-        32,                            /* bitsize */
-        FALSE,                         /* pc_relative */
-        0,                             /* bitpos */
-        complain_overflow_bitfield,    /* complain_on_overflow */
-        m88k_special_reloc,            /* special_function */
-        "VRT32",                       /* name */
-        FALSE,                         /* partial_inplace */
-        0xffffffff,                    /* src_mask */
-        0xffffffff,                    /* dst_mask */
-        TRUE),                         /* pcrel_offset */
-};
-
-/* Code to turn an external r_type into a pointer to an entry in the
-   above howto table.  */
-static void
-rtype2howto (arelent *cache_ptr, struct internal_reloc *dst)
-{
-  if (dst->r_type >= R_PCR16L && dst->r_type <= R_VRT32)
-    {
-      cache_ptr->howto = howto_table + dst->r_type - R_PCR16L;
-    }
-  else
-    {
-      BFD_ASSERT (0);
-    }
-}
-
-#define RTYPE2HOWTO(cache_ptr, dst) rtype2howto (cache_ptr, dst)
-
-/* Code to swap in the reloc offset */
-#define SWAP_IN_RELOC_OFFSET  H_GET_16
-#define SWAP_OUT_RELOC_OFFSET H_PUT_16
-
-#define RELOC_PROCESSING(relent,reloc,symbols,abfd,section)    \
-  reloc_processing(relent, reloc, symbols, abfd, section)
-
-static void
-reloc_processing (arelent *relent,
-                 struct internal_reloc *reloc,
-                 asymbol **symbols,
-                 bfd *abfd,
-                 asection *section)
-{
-  relent->address = reloc->r_vaddr;
-  rtype2howto (relent, reloc);
-
-  if (((int) reloc->r_symndx) > 0)
-    {
-      relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx];
-    }
-  else
-    {
-      relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
-    }
-
-  relent->addend = reloc->r_offset;
-  relent->address -= section->vma;
-}
-
-#define BADMAG(x) MC88BADMAG(x)
-
-#ifndef bfd_pe_print_pdata
-#define bfd_pe_print_pdata     NULL
-#endif
-
-#include "coffcode.h"
-
-#undef coff_write_armap
-
-CREATE_BIG_COFF_TARGET_VEC (m88k_coff_bcs_vec, "coff-m88kbcs", 0, 0, '_', NULL, COFF_SWAP_TABLE)
diff --git a/bfd/coffcode.h b/bfd/coffcode.h

index 311e8cd75b0627d3a17b5627fe82b905086fc42b..7ec95677b04816cf6ca11247994ac006ea06f2dc 100644 (file)
--- a/bfd/coffcode.h
+++ b/bfd/coffcode.h
@@ -32,12 +32,12 @@ SECTION
  
         Coff in all its varieties is implemented with a few common
         files and a number of implementation specific files. For
-       example, The 88k bcs coff format is implemented in the file
-       @file{coff-m88k.c}. This file @code{#include}s
-       @file{coff/m88k.h} which defines the external structure of the
-       coff format for the 88k, and @file{coff/internal.h} which
-       defines the internal structure. @file{coff-m88k.c} also
-       defines the relocations used by the 88k format
+       example, the i386 coff format is implemented in the file
+       @file{coff-i386.c}.  This file @code{#include}s
+       @file{coff/i386.h} which defines the external structure of the
+       coff format for the i386, and @file{coff/internal.h} which
+       defines the internal structure. @file{coff-i386.c} also
+       defines the relocations used by the i386 coff format
         @xref{Relocations}.
  
  SUBSECTION
@@ -2161,14 +2161,6 @@ coff_set_arch_mach_hook (bfd *abfd, void * filehdr)
        machine = bfd_mach_m68020;
        break;
  #endif
-#ifdef MC88MAGIC
-    case MC88MAGIC:
-    case MC88DMAGIC:
-    case MC88OMAGIC:
-      arch = bfd_arch_m88k;
-      machine = 88100;
-      break;
-#endif
  #ifdef Z80MAGIC
      case Z80MAGIC:
        arch = bfd_arch_z80;
@@ -2831,12 +2823,6 @@ coff_set_flags (bfd * abfd,
        return TRUE;
  #endif
  
-#ifdef MC88MAGIC
-    case bfd_arch_m88k:
-      *magicp = MC88OMAGIC;
-      return TRUE;
-#endif
-
  #ifdef SH_ARCH_MAGIC_BIG
      case bfd_arch_sh:
  #ifdef COFF_IMAGE_WITH_PE
@@ -3907,10 +3893,6 @@ coff_write_object_contents (bfd * abfd)
      internal_a.magic = TIC80_ARCH_MAGIC;
  #define __A_MAGIC_SET__
  #endif /* TIC80 */
-#if M88
-#define __A_MAGIC_SET__
-    internal_a.magic = PAGEMAGICBCS;
-#endif /* M88 */
  
  #if APOLLO_M68
  #define __A_MAGIC_SET__
@@ -5027,8 +5009,7 @@ SUBSUBSECTION
         o The reloc index is turned into a pointer to a howto
         structure, in a back end specific way. For instance, the 386
         uses the @code{r_type} to directly produce an index
-       into a howto table vector; the 88k subtracts a number from the
-       @code{r_type} field and creates an addend field.
+       into a howto table vector.
  */
  
  #ifndef CALC_ADDEND
diff --git a/bfd/coffswap.h b/bfd/coffswap.h

index 5fec8bf776f9921875ab8544c99a8d5e516d2958..844d601ba633ef9c1ebf0bd0dbc89aeb4f98adec 100644 (file)
--- a/bfd/coffswap.h
+++ b/bfd/coffswap.h
@@ -783,10 +783,6 @@ coff_swap_scnhdr_out (bfd * abfd, void * in, void * out)
    PUT_SCNHDR_RELPTR (abfd, scnhdr_int->s_relptr, scnhdr_ext->s_relptr);
    PUT_SCNHDR_LNNOPTR (abfd, scnhdr_int->s_lnnoptr, scnhdr_ext->s_lnnoptr);
    PUT_SCNHDR_FLAGS (abfd, scnhdr_int->s_flags, scnhdr_ext->s_flags);
-#if defined(M88)
-  H_PUT_32 (abfd, scnhdr_int->s_nlnno, scnhdr_ext->s_nlnno);
-  H_PUT_32 (abfd, scnhdr_int->s_nreloc, scnhdr_ext->s_nreloc);
-#else
    if (scnhdr_int->s_nlnno <= MAX_SCNHDR_NLNNO)
      PUT_SCNHDR_NLNNO (abfd, scnhdr_int->s_nlnno, scnhdr_ext->s_nlnno);
    else
@@ -817,7 +813,6 @@ coff_swap_scnhdr_out (bfd * abfd, void * in, void * out)
        PUT_SCNHDR_NRELOC (abfd, 0xffff, scnhdr_ext->s_nreloc);
        ret = 0;
      }
-#endif
  
  #ifdef COFF_ADJUST_SCNHDR_OUT_POST
    COFF_ADJUST_SCNHDR_OUT_POST (abfd, in, out);
diff --git a/bfd/config.bfd b/bfd/config.bfd

index 47ddb4c52f3f99e897f76c24e49063acc710450f..5ff00a2635bfbaaa00697e7dbd7acd61f36ca70b 100644 (file)
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -87,7 +87,6 @@ case $targ in
   m68*-*-bsd* | m68*-*-vsta* | \
   m68*-ericsson-* | \
   m68*-*-psos* | \
- m88*-*-* | \
   mips*-big-* | \
   mips*-dec-* | mips*el-*-ecoff* | \
   mips*-*-ecoff* | \
@@ -139,6 +138,7 @@ case $targ in
   m68*-apollo-* | \
   m68*-apple-aux* | \
   m68*-bull-sysv* | \
+ m88*-*-* | \
   maxq-*-coff | \
   mips*el-*-rtems* | \
   sparc-*-lynxos* | \
@@ -174,7 +174,6 @@ lm32)                targ_archs=bfd_lm32_arch ;;
  m6811*|m68hc11*) targ_archs="bfd_m68hc11_arch bfd_m68hc12_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;;
  m6812*|m68hc12*) targ_archs="bfd_m68hc12_arch bfd_m68hc11_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;;
  m68*)           targ_archs=bfd_m68k_arch ;;
-m88*)           targ_archs=bfd_m88k_arch ;;
  microblaze*)    targ_archs=bfd_microblaze_arch ;;
  mips*)          targ_archs=bfd_mips_arch ;;
  nds32*)                 targ_archs=bfd_nds32_arch ;;
@@ -988,23 +987,6 @@ case "${targ}" in
      targ_underscore=yes
      ;;
  
-  m88*-harris-cxux* | m88*-*-dgux* | m88*-*-sysv4*)
-    targ_defvec=m88k_elf32_vec
-    targ_selvecs=m88k_coff_bcs_vec
-    ;;
-  m88*-*-mach3*)
-    targ_defvec=m88k_aout_mach3_vec
-    targ_cflags=-DSTAT_FOR_EXEC
-    ;;
-  m88*-*-openbsd*)
-   targ_defvec=m88k_aout_obsd_vec
-   targ_underscore=yes
-   ;;
-  m88*-*-*)
-    targ_defvec=m88k_coff_bcs_vec
-    targ_underscore=yes
-    ;;
-
    mcore-*-elf)
      targ_defvec=mcore_elf32_be_vec
      targ_selvecs="mcore_elf32_be_vec mcore_elf32_le_vec"
diff --git a/bfd/configure b/bfd/configure

index 19472287aee799a7a405941f2c1b68ca9118c424..8b40c1d1698871232d21f2b523ab6be9f9ac6613 100755 (executable)
--- a/bfd/configure
+++ b/bfd/configure
@@ -14457,10 +14457,6 @@ do
      m68k_coff_un_vec)           tb="$tb coff-u68k.lo coff-m68k.lo $coff" ;;
      m68k_elf32_vec)             tb="$tb elf32-m68k.lo elf32.lo $elf" ;;
      m68k_versados_vec)          tb="$tb versados.lo" ;;
-    m88k_aout_mach3_vec)        tb="$tb m88kmach3.lo aout32.lo" ;;
-    m88k_aout_obsd_vec)                 tb="$tb m88kopenbsd.lo aout32.lo" ;;
-    m88k_coff_bcs_vec)          tb="$tb coff-m88k.lo $coffgen" ;;
-    m88k_elf32_vec)             tb="$tb elf32-m88k.lo elf32.lo $elf" ;;
      mach_o_be_vec)              tb="$tb mach-o.lo dwarf2.lo" ;;
      mach_o_le_vec)              tb="$tb mach-o.lo dwarf2.lo" ;;
      mach_o_fat_vec)             tb="$tb mach-o.lo dwarf2.lo" ;;
@@ -14906,18 +14902,6 @@ if test "${target}" = "${host}"; then
         COREFILE=trad-core.lo
         TRAD_HEADER='"hosts/m68kaux.h"'
         ;;
-  m88*-*-sysv4*)
-       ;;
-  m88*-motorola-sysv*)
-       COREFILE=ptrace-core.lo
-       ;;
-  m88*-*-mach3*)
-       COREFILE=trad-core.lo
-       TRAD_HEADER='"hosts/m88kmach3.h"'
-       ;;
-  m88*-*-openbsd*)
-       COREFILE=netbsd-core.lo
-       ;;
    ns32k-pc532-mach)
         COREFILE=trad-core.lo
         TRAD_HEADER='"hosts/pc532mach.h"'
diff --git a/bfd/configure.ac b/bfd/configure.ac

index 6ccd5820483b7c6c696fc5d6dcbe070d75202be6..de836c91d32018d68112db23ac2b2c6b251de3e7 100644 (file)
--- a/bfd/configure.ac
+++ b/bfd/configure.ac
@@ -534,10 +534,6 @@ do
      m68k_coff_un_vec)           tb="$tb coff-u68k.lo coff-m68k.lo $coff" ;;
      m68k_elf32_vec)             tb="$tb elf32-m68k.lo elf32.lo $elf" ;;
      m68k_versados_vec)          tb="$tb versados.lo" ;;
-    m88k_aout_mach3_vec)        tb="$tb m88kmach3.lo aout32.lo" ;;
-    m88k_aout_obsd_vec)                 tb="$tb m88kopenbsd.lo aout32.lo" ;;
-    m88k_coff_bcs_vec)          tb="$tb coff-m88k.lo $coffgen" ;;
-    m88k_elf32_vec)             tb="$tb elf32-m88k.lo elf32.lo $elf" ;;
      mach_o_be_vec)              tb="$tb mach-o.lo dwarf2.lo" ;;
      mach_o_le_vec)              tb="$tb mach-o.lo dwarf2.lo" ;;
      mach_o_fat_vec)             tb="$tb mach-o.lo dwarf2.lo" ;;
@@ -992,18 +988,6 @@ changequote([,])dnl
         COREFILE=trad-core.lo
         TRAD_HEADER='"hosts/m68kaux.h"'
         ;;
-  m88*-*-sysv4*)
-       ;;
-  m88*-motorola-sysv*)
-       COREFILE=ptrace-core.lo
-       ;;
-  m88*-*-mach3*)
-       COREFILE=trad-core.lo
-       TRAD_HEADER='"hosts/m88kmach3.h"'
-       ;;
-  m88*-*-openbsd*)
-       COREFILE=netbsd-core.lo
-       ;;
    ns32k-pc532-mach)
         COREFILE=trad-core.lo
         TRAD_HEADER='"hosts/pc532mach.h"'
diff --git a/bfd/cpu-m88k.c b/bfd/cpu-m88k.c

deleted file mode 100644 (file)

index 840efb3..0000000
--- a/bfd/cpu-m88k.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/* bfd back-end for m88k support
-   Copyright (C) 1990-2018 Free Software Foundation, Inc.
-   Written by Steve Chamberlain of Cygnus Support.
-
-   This file is part of BFD, the Binary File Descriptor library.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-   MA 02110-1301, USA.  */
-
-#include "sysdep.h"
-#include "bfd.h"
-#include "libbfd.h"
-
-const bfd_arch_info_type bfd_m88k_arch =
-  {
-    32,        /* 32 bits in a word */
-    32,        /* 32 bits in an address */
-    8, /* 8 bits in a byte */
-    bfd_arch_m88k,
-    88100,     /* only 1 machine */
-    "m88k",
-    "m88k:88100",
-    3,
-    TRUE, /* the one and only */
-    bfd_default_compatible,
-    bfd_default_scan,
-    bfd_arch_default_fill,
-    0,
-  };
diff --git a/bfd/cpu-ns32k.c b/bfd/cpu-ns32k.c

index cbd62d3a5a5068b5f0c46d175c6225db0d129e03..2eef0ba7bbe68420f581d1da21a9fa52a595a05d 100644 (file)
--- a/bfd/cpu-ns32k.c
+++ b/bfd/cpu-ns32k.c
@@ -220,8 +220,8 @@ do_ns32k_reloc (bfd *      abfd,
          the addend to be the negative of the position of the location
          within the section; for example, i386-aout does this.  For
          i386-aout, pcrel_offset is FALSE.  Some other targets do not
-        include the position of the location; for example, m88kbcs,
-        or ELF.  For those targets, pcrel_offset is TRUE.
+        include the position of the location; for example, ELF.
+        For those targets, pcrel_offset is TRUE.
  
          If we are producing relocatable output, then we must ensure
          that this reloc will be correctly computed when the final
@@ -793,12 +793,7 @@ _bfd_ns32k_final_link_relocate (reloc_howto_type *howto,
  
    /* If the relocation is PC relative, we want to set RELOCATION to
       the distance between the symbol (currently in RELOCATION) and the
-     location we are relocating.  Some targets (e.g., i386-aout)
-     arrange for the contents of the section to be the negative of the
-     offset of the location within the section; for such targets
-     pcrel_offset is FALSE.  Other targets (e.g., m88kbcs or ELF)
-     simply leave the contents of the section as zero; for such
-     targets pcrel_offset is TRUE.  If pcrel_offset is FALSE we do not
+     location we are relocating.  If pcrel_offset is FALSE we do not
       need to subtract out the offset of the location within the
       section (which is just ADDRESS).  */
    if (howto->pc_relative)
diff --git a/bfd/elf32-m88k.c b/bfd/elf32-m88k.c

deleted file mode 100644 (file)

index 36aacdc..0000000
--- a/bfd/elf32-m88k.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/* Motorola 88k-specific support for 32-bit ELF
-   Copyright (C) 1993-2018 Free Software Foundation, Inc.
-
-   This file is part of BFD, the Binary File Descriptor library.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-   MA 02110-1301, USA.  */
-
-#include "sysdep.h"
-#include "bfd.h"
-#include "libbfd.h"
-#include "elf-bfd.h"
-
-/* This does not include any relocations, but should be good enough
-   for GDB.  */
-
-#define TARGET_BIG_SYM         m88k_elf32_vec
-#define TARGET_BIG_NAME                "elf32-m88k"
-#define ELF_ARCH               bfd_arch_m88k
-#define ELF_MACHINE_CODE       EM_88K
-#define ELF_MAXPAGESIZE                1 /* FIXME: This number is wrong,  It should be the page size in bytes.  */
-#define bfd_elf32_bfd_reloc_type_lookup bfd_default_reloc_type_lookup
-#define bfd_elf32_bfd_reloc_name_lookup _bfd_norelocs_bfd_reloc_name_lookup
-#define elf_info_to_howto              _bfd_elf_no_info_to_howto
-
-#include "elf32-target.h"
diff --git a/bfd/elf32-nds32.c b/bfd/elf32-nds32.c

index 449e834b18af19e7ebce73ae34ec6450f9dabb80..61f48004b4bb0810db7ace24f4d364a459e9b6e3 100644 (file)
--- a/bfd/elf32-nds32.c
+++ b/bfd/elf32-nds32.c
@@ -4234,12 +4234,7 @@ nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
  
    /* If the relocation is PC relative, we want to set RELOCATION to
       the distance between the symbol (currently in RELOCATION) and the
-     location we are relocating.  Some targets (e.g., i386-aout)
-     arrange for the contents of the section to be the negative of the
-     offset of the location within the section; for such targets
-     pcrel_offset is FALSE.  Other targets (e.g., m88kbcs or ELF)
-     simply leave the contents of the section as zero; for such
-     targets pcrel_offset is TRUE.  If pcrel_offset is FALSE we do not
+     location we are relocating.  If pcrel_offset is FALSE we do not
       need to subtract out the offset of the location within the
       section (which is just ADDRESS).  */
    if (howto->pc_relative)
diff --git a/bfd/hosts/m88kmach3.h b/bfd/hosts/m88kmach3.h

deleted file mode 100644 (file)

index 7e22cc5..0000000
--- a/bfd/hosts/m88kmach3.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/* Copyright (C) 2007-2018 Free Software Foundation, Inc.
-
-   This file is part of BFD, the Binary File Descriptor library.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-   MA 02110-1301, USA.  */
-
-#include <machine/vmparam.h>
-#include <sys/param.h>
-
-#undef UPAGES
-#define UPAGES 3
-
-#define        HOST_PAGE_SIZE          NBPG
-#define        HOST_SEGMENT_SIZE       NBPG
-#define        HOST_MACHINE_ARCH       bfd_arch_m88k
-#define        HOST_TEXT_START_ADDR    USRTEXT
-#define        HOST_STACK_END_ADDR     USRSTACK
diff --git a/bfd/m88kmach3.c b/bfd/m88kmach3.c

deleted file mode 100644 (file)

index f0c656f..0000000
--- a/bfd/m88kmach3.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/* BFD back-end for Motorola m88k a.out (Mach 3) binaries.
-   Copyright (C) 1990-2018 Free Software Foundation, Inc.
-
-   This file is part of BFD, the Binary File Descriptor library.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-   MA 02110-1301, USA.  */
-
-#define        TARGET_PAGE_SIZE        (4096*2)
-#define SEGMENT_SIZE   0x20000
-#define TEXT_START_ADDR        0
-#define N_HEADER_IN_TEXT(x)    1               /* (N_MAGIG(x) == ZMAGIC) */
-
-#define N_TXTSIZE(x)   ((x)->a_text)
-
-#include "sysdep.h"
-#include "bfd.h"
-#include "libbfd.h"
-#include "libaout.h"
-
-#define DEFAULT_ARCH bfd_arch_m88k
-
-/* Do not "beautify" the CONCAT* macro args.  Traditional C will not
-   remove whitespace added here, and thus will fail to concatenate
-   the tokens.  */
-#define MY(OP) CONCAT2 (m88k_aout_mach3_,OP)
-#define TARGETNAME "a.out-m88k-mach3"
-
-#include "aout-target.h"
diff --git a/bfd/m88kopenbsd.c b/bfd/m88kopenbsd.c

deleted file mode 100644 (file)

index ffc00c3..0000000
--- a/bfd/m88kopenbsd.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/* BFD back-end for OpenBSD/m88k a.out binaries.
-   Copyright (C) 2004-2018 Free Software Foundation, Inc.
-
-   This file is part of BFD, the Binary File Descriptor library.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-   MA 02110-1301, USA.  */
-
-#define        TARGET_IS_BIG_ENDIAN_P
-
-#define        TARGET_PAGE_SIZE        4096
-
-#define        DEFAULT_ARCH            bfd_arch_m88k
-#define        DEFAULT_MID             M_88K_OPENBSD
-
-/* Do not "beautify" the CONCAT* macro args.  Traditional C will not
-   remove whitespace added here, and thus will fail to concatenate
-   the tokens.  */
-#define MY(OP) CONCAT2 (m88k_aout_obsd_,OP)
-#define TARGETNAME "a.out-m88k-openbsd"
-
-#include "netbsd.h"
diff --git a/bfd/mach-o.c b/bfd/mach-o.c

index ded60cf3f6a7556412b238586befb4871eb99ad8..cfae3547046d2b8e60135db9cc80834efbcfc8fb 100644 (file)
--- a/bfd/mach-o.c
+++ b/bfd/mach-o.c
@@ -1040,9 +1040,6 @@ bfd_mach_o_convert_architecture (bfd_mach_o_cpu_type mtype,
           break;
         }
        break;
-    case BFD_MACH_O_CPU_TYPE_MC88000:
-      *type = bfd_arch_m88k;
-      break;
      case BFD_MACH_O_CPU_TYPE_SPARC:
        *type = bfd_arch_sparc;
        *subtype = bfd_mach_sparc;
@@ -5435,8 +5432,6 @@ bfd_mach_o_stack_addr (enum bfd_mach_o_cpu_type type)
      {
      case BFD_MACH_O_CPU_TYPE_MC680x0:
        return 0x04000000;
-    case BFD_MACH_O_CPU_TYPE_MC88000:
-      return 0xffffe000;
      case BFD_MACH_O_CPU_TYPE_POWERPC:
        return 0xc0000000;
      case BFD_MACH_O_CPU_TYPE_I386:
diff --git a/bfd/netbsd-core.c b/bfd/netbsd-core.c

index da8a14cbfadbef7eff554616816c69658ce05d7f..7da98247023daad168a8c29d746c2e8c99af080e 100644 (file)
--- a/bfd/netbsd-core.c
+++ b/bfd/netbsd-core.c
@@ -198,10 +198,6 @@ netbsd_core_file_p (bfd *abfd)
        bfd_default_set_arch_mach (abfd, bfd_arch_m68k, 0);
        break;
  
-    case M_88K_OPENBSD:
-      bfd_default_set_arch_mach (abfd, bfd_arch_m88k, 0);
-      break;
-
      case M_HPPA_OPENBSD:
        bfd_default_set_arch_mach (abfd, bfd_arch_hppa, bfd_mach_hppa11);
        break;
diff --git a/bfd/po/SRC-POTFILES.in b/bfd/po/SRC-POTFILES.in

index 6c6a6d599ff286446d03d65dda11abf510da5561..89c519d88e4d9fc77e6e2644a86d60152a4c68f1 100644 (file)
--- a/bfd/po/SRC-POTFILES.in
+++ b/bfd/po/SRC-POTFILES.in
@@ -31,7 +31,6 @@ coff-bfd.c
  coff-go32.c
  coff-i386.c
  coff-m68k.c
-coff-m88k.c
  coff-mips.c
  coff-rs6000.c
  coff-sh.c
@@ -89,7 +88,6 @@ cpu-m32r.c
  cpu-m68hc11.c
  cpu-m68hc12.c
  cpu-m68k.c
-cpu-m88k.c
  cpu-m9s12x.c
  cpu-m9s12xg.c
  cpu-mcore.c
@@ -188,7 +186,6 @@ elf32-m68hc11.c
  elf32-m68hc12.c
  elf32-m68hc1x.c
  elf32-m68k.c
-elf32-m88k.c
  elf32-mcore.c
  elf32-mep.c
  elf32-metag.c
@@ -289,8 +286,6 @@ lynx-core.c
  m68k4knetbsd.c
  m68klinux.c
  m68knetbsd.c
-m88kmach3.c
-m88kopenbsd.c
  mach-o-aarch64.c
  mach-o-arm.c
  mach-o-i386.c
diff --git a/bfd/reloc.c b/bfd/reloc.c

index 9da91288730f00083f8fd3755fb8e9e2f4a6c6cf..9d86dee667cffcd2b02c09d5b4e940028f2bc3fe 100644 (file)
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -361,7 +361,7 @@ CODE_FRAGMENT
  .     slot of the instruction, so that a PC relative relocation can
  .     be made just by adding in an ordinary offset (e.g., sun3 a.out).
  .     Some formats leave the displacement part of an instruction
-.     empty (e.g., m88k bcs); this flag signals the fact.  *}
+.     empty (e.g., ELF); this flag signals the fact.  *}
  .  bfd_boolean pcrel_offset;
  .};
  .
@@ -704,8 +704,8 @@ bfd_perform_relocation (bfd *abfd,
          the addend to be the negative of the position of the location
          within the section; for example, i386-aout does this.  For
          i386-aout, pcrel_offset is FALSE.  Some other targets do not
-        include the position of the location; for example, m88kbcs,
-        or ELF.  For those targets, pcrel_offset is TRUE.
+        include the position of the location; for example, ELF.
+        For those targets, pcrel_offset is TRUE.
  
          If we are producing relocatable output, then we must ensure
          that this reloc will be correctly computed when the final
@@ -1095,8 +1095,8 @@ bfd_install_relocation (bfd *abfd,
          the addend to be the negative of the position of the location
          within the section; for example, i386-aout does this.  For
          i386-aout, pcrel_offset is FALSE.  Some other targets do not
-        include the position of the location; for example, m88kbcs,
-        or ELF.  For those targets, pcrel_offset is TRUE.
+        include the position of the location; for example, ELF.
+        For those targets, pcrel_offset is TRUE.
  
          If we are producing relocatable output, then we must ensure
          that this reloc will be correctly computed when the final
@@ -1405,11 +1405,11 @@ _bfd_final_link_relocate (reloc_howto_type *howto,
       location we are relocating.  Some targets (e.g., i386-aout)
       arrange for the contents of the section to be the negative of the
       offset of the location within the section; for such targets
-     pcrel_offset is FALSE.  Other targets (e.g., m88kbcs or ELF)
-     simply leave the contents of the section as zero; for such
-     targets pcrel_offset is TRUE.  If pcrel_offset is FALSE we do not
-     need to subtract out the offset of the location within the
-     section (which is just ADDRESS).  */
+     pcrel_offset is FALSE.  Other targets (e.g., ELF) simply leave
+     the contents of the section as zero; for such targets
+     pcrel_offset is TRUE.  If pcrel_offset is FALSE we do not need to
+     subtract out the offset of the location within the section (which
+     is just ADDRESS).  */
    if (howto->pc_relative)
      {
        relocation -= (input_section->output_section->vma
diff --git a/bfd/targets.c b/bfd/targets.c

index b505c97fd7287f538f9c326a1a54f8bd218fadaf..549ef8933c345c3ced8a90fb029988a003c7b908 100644 (file)
--- a/bfd/targets.c
+++ b/bfd/targets.c
@@ -712,10 +712,6 @@ extern const bfd_target m68k_coff_sysv_vec;
  extern const bfd_target m68k_coff_un_vec;
  extern const bfd_target m68k_elf32_vec;
  extern const bfd_target m68k_versados_vec;
-extern const bfd_target m88k_aout_mach3_vec;
-extern const bfd_target m88k_aout_obsd_vec;
-extern const bfd_target m88k_coff_bcs_vec;
-extern const bfd_target m88k_elf32_vec;
  extern const bfd_target mach_o_be_vec;
  extern const bfd_target mach_o_le_vec;
  extern const bfd_target mach_o_fat_vec;
@@ -1156,11 +1152,6 @@ static const bfd_target * const _bfd_target_vector[] =
         &m68k_elf32_vec,
         &m68k_versados_vec,
  
-       &m88k_aout_mach3_vec,
-       &m88k_aout_obsd_vec,
-       &m88k_coff_bcs_vec,
-       &m88k_elf32_vec,
-
         &mach_o_be_vec,
         &mach_o_le_vec,
         &mach_o_fat_vec,
diff --git a/binutils/ChangeLog b/binutils/ChangeLog

index 27744d67471eb36dbb55ce77ce7b67a7a9e0d63d..e0255298a5f98e7e546f03d30924da01dd2eac9d 100644 (file)
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,3 +1,8 @@
+2018-04-16  Alan Modra  <amodra@gmail.com>
+
+       * MAINTAINERS (Mark Kettenis): Move to past maintainers.
+       * testsuite/binutils-all/objdump.exp: Remove m88k support.
+
  2018-04-16  Alan Modra  <amodra@gmail.com>
  
         * readelf.c: Remove i370 support.
diff --git a/binutils/MAINTAINERS b/binutils/MAINTAINERS

index 052e282b44b5e3b8bf1f3ec70238da8484e70a6f..056d113fd209311560ef37827c0b75d1e371f2de 100644 (file)
--- a/binutils/MAINTAINERS
+++ b/binutils/MAINTAINERS
@@ -97,7 +97,6 @@ responsibility among the other maintainers.
    M32R             Doug Evans <dje@sebabeach.org>
    M68HC11 M68HC12  Stephane Carrez <Stephane.Carrez@gmail.com>
    M68HC11 M68HC12  Sean Keys <skeys@ipdatasys.com>
-  M88k            Mark Kettenis <kettenis@gnu.org>
    MACH-O           Tristan Gingold <tgingold@free.fr>
    MAXQ            Inderpreet Singh <inderpreetb@noida.hcltech.com>
    MEP             Dave Brolley <brolley@redhat.com>
@@ -157,6 +156,7 @@ goes with them.
    Paul Brook
    Eric Christopher
    Jason Eckhardt
+  Mark Kettenis
    Mei Ligang
    Mark Mitchell
    Bernd Schmidt
diff --git a/binutils/testsuite/binutils-all/objdump.exp b/binutils/testsuite/binutils-all/objdump.exp

index 6bbe652fd856e299013e77325b8d46e7f7dc1a06..0c134225b4f2451717c7b66623e43a772b546c3f 100644 (file)
--- a/binutils/testsuite/binutils-all/objdump.exp
+++ b/binutils/testsuite/binutils-all/objdump.exp
@@ -36,7 +36,7 @@ set got [binutils_run $OBJDUMP "$OBJDUMPFLAGS -i"]
  set cpus_expected [list]
  lappend cpus_expected aarch64 alpha am33-2 arc ARC700 ARCv2 arm cris
  lappend cpus_expected d10v d30v fr30 fr500 fr550 h8 hppa i386 iamcu ip2022
-lappend cpus_expected m16c m32c m32r m68hc11 m68hc12 m68k m88k MCore mep c5 h1 MicroBlaze
+lappend cpus_expected m16c m32c m32r m68hc11 m68hc12 m68k MCore mep c5 h1 MicroBlaze
  lappend cpus_expected mips mn10200 mn10300 ms1 msp MSP430 nds32 n1h_v3 ns32k
  lappend cpus_expected or1k or1knd pj powerpc pyramid riscv romp rs6000 s390 sh sparc
  lappend cpus_expected tic54x tic80 tilegx tms320c30 tms320c4x tms320c54x
diff --git a/gas/ChangeLog b/gas/ChangeLog

index ed55aa7cef4356d6e2410ba06f0b197fbc43e997..d63b6d6ad560de94411d15955368c2b152b52007 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2018-04-16  Alan Modra  <amodra@gmail.com>
+
+       * configure.ac: Remove m88k support.
+       * config.in: Regenerate.
+       * configure: Regenerate.
+
  2018-04-16  Alan Modra  <amodra@gmail.com>
  
         * Makefile.am: Remove i370 support.
diff --git a/gas/config.in b/gas/config.in

index 76c7c17f5088886573489b28c562917b6685edd6..068de0664e36d9ceef512dacd020ffb2f90aafdc 100644 (file)
--- a/gas/config.in
+++ b/gas/config.in
@@ -184,9 +184,6 @@
  /* Using m68k COFF? */
  #undef M68KCOFF
  
-/* Using m88k COFF? */
-#undef M88KCOFF
-
  /* Default CPU for MIPS targets. */
  #undef MIPS_CPU_STRING_DEFAULT
  
diff --git a/gas/configure b/gas/configure

index a4393b538eb0f528a61e3f001be159e23884124c..2d050505cf32bd00d4178acb14f9b778b0172647 100755 (executable)
--- a/gas/configure
+++ b/gas/configure
@@ -12771,9 +12771,6 @@ $as_echo "#define I386COFF 1" >>confdefs.h
   ;;
        m68k)
  $as_echo "#define M68KCOFF 1" >>confdefs.h
- ;;
-      m88k)
-$as_echo "#define M88KCOFF 1" >>confdefs.h
   ;;
        x86_64)
  $as_echo "#define I386COFF 1" >>confdefs.h
diff --git a/gas/configure.ac b/gas/configure.ac

index 2c4e3eb118a799e8f864886aa4496be3bc0b2583..c453398df44e36ac09f8724e048282f1de96361d 100644 (file)
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -689,7 +689,6 @@ case ${obj_format} in
      case ${target_cpu_type} in
        i386) AC_DEFINE(I386COFF, 1, [Using i386 COFF?]) ;;
        m68k) AC_DEFINE(M68KCOFF, 1, [Using m68k COFF?]) ;;
-      m88k) AC_DEFINE(M88KCOFF, 1, [Using m88k COFF?]) ;;
        x86_64) AC_DEFINE(I386COFF, 1, [Using i386 COFF?]) ;;
      esac
      ;;
diff --git a/include/ChangeLog b/include/ChangeLog

index cd989325c40c825316a1517cb9a78d8bd0845a7d..d0a7a4a4c9718e3904615106500f1a8097fa5b7d 100644 (file)
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,9 @@
+2018-04-16  Alan Modra  <amodra@gmail.com>
+
+       * coff/internal.h: Remove m88k support.
+       * coff/m88k.h: Delete.
+       * opcode/m88k.h: Delete.
+
  2018-04-16  Alan Modra  <amodra@gmail.com>
  
         * elf/i370.h: Delete.
diff --git a/include/coff/internal.h b/include/coff/internal.h

index 8713c71b75f35d8eb7e330af2edf67e53e4ff735..47f2a54998363ad3b6a4c7f31bcf420be73640ee 100644 (file)
--- a/include/coff/internal.h
+++ b/include/coff/internal.h
@@ -344,10 +344,6 @@ struct internal_aouthdr
  #define C_PRAGMA       111     /* Advice to compiler or linker */
  #define C_SEGMENT      112     /* 80960 segment name           */
  
-  /* Storage classes for m88k */
-#define C_SHADOW        107     /* shadow symbol                */
-#define C_VERSION       108     /* coff version symbol          */
-
   /* New storage classes for RS/6000 */
  #define C_HIDEXT        107    /* Un-named external symbol */
  #define C_BINCL         108    /* Marks beginning of include file */
diff --git a/include/coff/m88k.h b/include/coff/m88k.h

deleted file mode 100644 (file)

index 6c1e544..0000000
--- a/include/coff/m88k.h
+++ /dev/null
@@ -1,197 +0,0 @@
-/* coff information for 88k bcs
-   
-   Copyright (C) 2001-2018 Free Software Foundation, Inc.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-   
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-   
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-   MA 02110-1301, USA.  */
-
-#define DO_NOT_DEFINE_SCNHDR
-#define L_LNNO_SIZE 4
-#define DO_NOT_DEFINE_SYMENT
-#define DO_NOT_DEFINE_AUXENT
-#include "coff/external.h"
-
-#define MC88MAGIC  0540           /* 88k BCS executable */
-#define MC88DMAGIC 0541           /* DG/UX executable   */
-#define MC88OMAGIC 0555                  /* Object file        */
-
-#define MC88BADMAG(x) (((x).f_magic != MC88MAGIC) \
-                    && ((x).f_magic != MC88DMAGIC) \
-                    && ((x).f_magic != MC88OMAGIC))
-
-#define PAGEMAGIC3   0414 /* Split i&d, zero mapped */
-#define PAGEMAGICBCS 0413
-
-/********************** SECTION HEADER **********************/
-
-struct external_scnhdr 
-{
-  char         s_name[8];      /* section name                 */
-  char         s_paddr[4];     /* physical address, aliased s_nlib */
-  char         s_vaddr[4];     /* virtual address              */
-  char         s_size[4];      /* section size                 */
-  char         s_scnptr[4];    /* file ptr to raw data for section */
-  char         s_relptr[4];    /* file ptr to relocation       */
-  char         s_lnnoptr[4];   /* file ptr to line numbers     */
-  char         s_nreloc[4];    /* number of relocation entries */
-  char         s_nlnno[4];     /* number of line number entries*/
-  char         s_flags[4];     /* flags                        */
-};
-
-#define        SCNHDR  struct external_scnhdr
-#define        SCNHSZ  44
-
-/* Names of "special" sections.  */
-#define _TEXT   ".text"
-#define _DATA   ".data"
-#define _BSS    ".bss"
-#define _COMMENT ".comment"
-
-
-/********************** SYMBOLS **********************/
-
-#define E_SYMNMLEN     8       /* # characters in a symbol name        */
-#define E_FILNMLEN     14      /* # characters in a file name          */
-#define E_DIMNUM       4       /* # array dimensions in auxiliary entry */
-
-struct external_syment 
-{
-  union
-  {
-    char e_name[E_SYMNMLEN];
-
-    struct
-    {
-      char e_zeroes[4];
-      char e_offset[4];
-    } e;
-
-  } e;
-
-  char e_value[4];
-  char e_scnum[2];
-  char e_type[2];
-  char e_sclass[1];
-  char e_numaux[1];
-  char pad2[2];
-};
-
-#define N_BTMASK       017
-#define N_TMASK                060
-#define N_BTSHFT       4
-#define N_TSHIFT       2
-
-/* Note that this isn't the same shape as other coffs */
-union external_auxent
-{
-  struct
-  {
-    char x_tagndx[4];          /* str, un, or enum tag indx */
-    /* 4 */
-    
-    union
-    {
-      char x_fsize[4];         /* size of function */
-
-      struct
-      {
-       char  x_lnno[4];        /* declaration line number */
-       char  x_size[4];        /* str/union/array size */
-      } x_lnsz;
-
-    } x_misc;
-    
-    /* 12 */
-    union
-    {
-      struct                   /* if ISFCN, tag, or .bb */
-      {
-       char x_lnnoptr[4];      /* ptr to fcn line # */
-       char x_endndx[4];               /* entry ndx past block end */
-      } x_fcn;
-
-      struct                   /* if ISARY, up to 4 dimen. */
-      {
-       char x_dimen[E_DIMNUM][2];
-      } x_ary;
-
-    } x_fcnary;
-    /* 20 */
-    
-  } x_sym;
-  
-  union
-  {
-    char x_fname[E_FILNMLEN];
-
-    struct
-    {
-      char x_zeroes[4];
-      char x_offset[4];
-    } x_n;
-
-  } x_file;
-  
-  struct
-  {
-    char x_scnlen[4];          /* section length */
-    char x_nreloc[4];          /* # relocation entries */
-    char x_nlinno[4];          /* # line numbers */
-  } x_scn;
-  
-  struct
-  {
-    char x_tvfill[4];          /* tv fill value */
-    char x_tvlen[2];           /* length of .tv */
-    char x_tvran[2][2];                /* tv range */
-  } x_tv;                      /* info about .tv section (in auxent of symbol .tv)) */
-};
-
-#define GET_LNSZ_SIZE(abfd, ext) \
-  H_GET_32 (abfd, ext->x_sym.x_misc.x_lnsz.x_size)
-#define GET_LNSZ_LNNO(abfd, ext) \
-  H_GET_32 (abfd, ext->x_sym.x_misc.x_lnsz.x_lnno)
-#define PUT_LNSZ_LNNO(abfd, in, ext) \
-  H_PUT_32 (abfd, in, ext->x_sym.x_misc.x_lnsz.x_lnno)
-#define PUT_LNSZ_SIZE(abfd, in, ext) \
-  H_PUT_32 (abfd, in, ext->x_sym.x_misc.x_lnsz.x_size)
-#define GET_SCN_NRELOC(abfd, ext) \
-  H_GET_32 (abfd, ext->x_scn.x_nreloc)
-#define GET_SCN_NLINNO(abfd, ext) \
-  H_GET_32 (abfd, ext->x_scn.x_nlinno)
-#define PUT_SCN_NRELOC(abfd, in, ext) \
-  H_PUT_32 (abfd, in, ext->x_scn.x_nreloc)
-#define PUT_SCN_NLINNO(abfd, in, ext) \
-  H_PUT_32 (abfd,in, ext->x_scn.x_nlinno)
-
-#define        SYMENT  struct external_syment
-#define        SYMESZ  20
-#define        AUXENT  union external_auxent
-#define        AUXESZ  20
-
-/********************** RELOCATION DIRECTIVES **********************/
-
-struct external_reloc
-{
-  char r_vaddr[4];
-  char r_symndx[4];
-  char r_type[2];
-  char r_offset[2];
-};
-
-#define RELOC struct external_reloc
-#define RELSZ  12
-
-#define NO_TVNDX
diff --git a/include/opcode/m88k.h b/include/opcode/m88k.h

deleted file mode 100644 (file)

index a3eea2a..0000000
--- a/include/opcode/m88k.h
+++ /dev/null
@@ -1,454 +0,0 @@
-/* Table of opcodes for the Motorola M88k family.
-   Copyright (C) 1989-2018 Free Software Foundation, Inc.
-
-   This file is part of GDB and GAS.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-   MA 02110-1301, USA.  */
-
-/*
- *                     Disassembler Instruction Table
- *
- *     The first field of the table is the opcode field. If an opcode
- *     is specified which has any non-opcode bits on, a system error
- *     will occur when the system attempts the install it into the
- *     instruction table.  The second parameter is a pointer to the
- *     instruction mnemonic. Each operand is specified by offset, width,
- *     and type. The offset is the bit number of the least significant
- *     bit of the operand with bit 0 being the least significant bit of
- *     the instruction. The width is the number of bits used to specify
- *     the operand. The type specifies the output format to be used for
- *     the operand. The valid formats are: register, register indirect,
- *     hex constant, and bit field specification.  The last field is a
- *     pointer to the next instruction in the linked list.  These pointers
- *     are initialized by init_disasm().
- *
- *                             Revision History
- *
- *     Revision 1.0    11/08/85        Creation date
- *              1.1    02/05/86        Updated instruction mnemonic table MD
- *              1.2    06/16/86        Updated SIM_FLAGS for floating point
- *              1.3    09/20/86        Updated for new encoding
- *                     05/11/89        R. Trawick adapted from Motorola disassembler
- */
-
-#include <stdio.h>
-
-/* Define the number of bits in the primary opcode field of the instruction,
-   the destination field, the source 1 and source 2 fields.  */
-
-/* Size of opcode field.  */
-#define OP 8
-
-/* Size of destination.  */
-#define DEST 6
-
-/* Size of source1.  */
-#define SOURCE1 6
-
-/* Size of source2.  */
-#define SOURCE2 6
-
-/* Number of registers.  */
-#define REGs 32
-
-/* Type definitions.  */
-
-typedef unsigned int UINT;
-#define    WORD    long
-#define    FLAG    unsigned
-#define    STATE   short
-
-/* The next four equates define the priorities that the various classes
- * of instructions have regarding writing results back into registers and
- * signalling exceptions.  */
-
-/* PMEM is also defined in <sys/param.h> on Delta 88's.  Sigh!  */
-#undef PMEM
-
-/* Integer priority.  */
-#define    PINT  0
-
-/* Floating point priority.  */
-#define    PFLT  1
-
-/* Memory priority.  */
-#define    PMEM  2
-
-/* Not applicable, instruction doesn't write to regs.  */
-#define    NA    3
-
-/* Highest of these priorities.  */
-#define    HIPRI 3
-
-/* The instruction registers are an artificial mechanism to speed up
- * simulator execution.  In the real processor, an instruction register
- * is 32 bits wide.  In the simulator, the 32 bit instruction is kept in
- * a structure field called rawop, and the instruction is partially decoded,
- * and split into various fields and flags which make up the other fields
- * of the structure.
- * The partial decode is done when the instructions are initially loaded
- * into simulator memory.  The simulator code memory is not an array of
- * 32 bit words, but is an array of instruction register structures.
- * Yes this wastes memory, but it executes much quicker.
- */
-
-struct IR_FIELDS
-{
-  unsigned op:OP,
-    dest: DEST,
-    src1: SOURCE1,
-    src2: SOURCE2;
-  int ltncy,
-    extime,
-    /* Writeback priority.  */
-    wb_pri;
-  /* Immediate size.  */
-  unsigned        imm_flags:2,
-    /* Register source 1 used.  */
-    rs1_used:1,
-    /* Register source 2 used. */
-    rs2_used:1,
-    /* Register source/dest. used.  */
-    rsd_used:1,
-    /* Complement.  */
-    c_flag:1,
-    /* Upper half word.  */
-    u_flag:1,
-    /* Execute next.  */
-    n_flag:1,
-    /* Uses writeback slot.  */
-    wb_flag:1,
-    /* Dest size.  */
-    dest_64:1,
-    /* Source 1 size.  */
-    s1_64:1,
-    /* Source 2 size.  */
-    s2_64:1,
-    scale_flag:1,
-    /* Scaled register.  */
-    brk_flg:1;
-};
-
-struct mem_segs
-{
-  /* Pointer (returned by calloc) to segment.  */
-  struct mem_wrd *seg;                 
-
-  /* Base load address from file headers.  */
-  unsigned long baseaddr;                      
-
-  /* Ending address of segment.  */
-  unsigned long endaddr;               
-
-  /* Segment control flags (none defined).  */ 
-  int        flags;                    
-};
-
-#define        MAXSEGS         (10)                    /* max number of segment allowed */
-#define        MEMSEGSIZE      (sizeof(struct mem_segs))/* size of mem_segs structure */
-
-#if 0
-#define BRK_RD         (0x01)                  /* break on memory read */
-#define BRK_WR         (0x02)                  /* break on memory write */
-#define BRK_EXEC       (0x04)                  /* break on execution */
-#define        BRK_CNT         (0x08)                  /* break on terminal count */
-#endif
-
-struct mem_wrd
-{
-  /* Simulator instruction break down.  */
-  struct IR_FIELDS opcode;
-  union {
-    /* Memory element break down.  */
-    unsigned long  l;
-    unsigned short s[2];
-    unsigned char  c[4];
-  } mem;
-};
-
-/* Size of each 32 bit memory model.  */
-#define        MEMWRDSIZE      (sizeof (struct mem_wrd))
-
-extern struct mem_segs memory[];
-extern struct PROCESSOR m78000;
-
-struct PROCESSOR
-{
-  unsigned WORD
-  /* Execute instruction pointer.  */
-  ip, 
-    /* Vector base register.  */
-    vbr,
-    /* Processor status register.  */
-    psr;
-  
-  /* Source 1.  */
-  WORD    S1bus,
-    /* Source 2.  */
-    S2bus,
-    /* Destination.  */
-    Dbus,
-    /* Data address bus.  */
-    DAbus,
-    ALU,
-    /* Data registers.  */
-    Regs[REGs],
-    /* Max clocks before reg is available.  */
-    time_left[REGs],
-    /* Writeback priority of reg.  */
-    wb_pri[REGs], 
-    /* Integer unit control regs.  */
-    SFU0_regs[REGs],
-    /* Floating point control regs.  */
-    SFU1_regs[REGs], 
-    Scoreboard[REGs],
-    Vbr;
-  unsigned WORD   scoreboard,
-    Psw,
-    Tpsw;
-  /* Waiting for a jump instruction.  */
-  FLAG   jump_pending:1;
-};
-
-/* Size of immediate field.  */
-
-#define    i26bit      1
-#define    i16bit      2
-#define    i10bit      3
-
-/* Definitions for fields in psr.  */
-
-#define psr_mode  31
-#define psr_rbo   30
-#define psr_ser   29
-#define psr_carry 28
-#define psr_sf7m  11
-#define psr_sf6m  10
-#define psr_sf5m   9
-#define psr_sf4m   8
-#define psr_sf3m   7
-#define psr_sf2m   6
-#define psr_sf1m   5
-#define psr_mam    4
-#define psr_inm    3
-#define psr_exm    2
-#define psr_trm    1
-#define psr_ovfm   0
-
-/* The 1 clock operations.  */
-
-#define    ADDU        1
-#define    ADDC        2
-#define    ADDUC       3
-#define    ADD         4
-
-#define    SUBU    ADD+1
-#define    SUBB    ADD+2
-#define    SUBUB   ADD+3
-#define    SUB     ADD+4
-
-#define    AND_    ADD+5
-#define    OR      ADD+6
-#define    XOR     ADD+7
-#define    CMP     ADD+8
-
-/* Loads.  */
-
-#define    LDAB    CMP+1
-#define    LDAH    CMP+2
-#define    LDA     CMP+3
-#define    LDAD    CMP+4
-
-#define    LDB   LDAD+1
-#define    LDH   LDAD+2
-#define    LD    LDAD+3
-#define    LDD   LDAD+4
-#define    LDBU  LDAD+5
-#define    LDHU  LDAD+6
-
-/* Stores.  */
-
-#define    STB    LDHU+1
-#define    STH    LDHU+2
-#define    ST     LDHU+3
-#define    STD    LDHU+4
-
-/* Exchange.  */
-
-#define    XMEMBU LDHU+5
-#define    XMEM   LDHU+6
-
-/* Branches.  */
-
-#define    JSR    STD+1
-#define    BSR    STD+2
-#define    BR     STD+3
-#define    JMP    STD+4
-#define    BB1    STD+5
-#define    BB0    STD+6
-#define    RTN    STD+7
-#define    BCND   STD+8
-
-/* Traps.  */
-
-#define    TB1    BCND+1
-#define    TB0    BCND+2
-#define    TCND   BCND+3
-#define    RTE    BCND+4
-#define    TBND   BCND+5
-
-/* Misc.  */
-
-#define    MUL     TBND + 1
-#define    DIV     MUL  +2
-#define    DIVU    MUL  +3
-#define    MASK    MUL  +4
-#define    FF0     MUL  +5
-#define    FF1     MUL  +6
-#define    CLR     MUL  +7
-#define    SET     MUL  +8
-#define    EXT     MUL  +9
-#define    EXTU    MUL  +10
-#define    MAK     MUL  +11
-#define    ROT     MUL  +12
-
-/* Control register manipulations.  */
-
-#define    LDCR    ROT  +1
-#define    STCR    ROT  +2
-#define    XCR     ROT  +3
-
-#define    FLDCR    ROT  +4
-#define    FSTCR    ROT  +5
-#define    FXCR     ROT  +6
-
-#define    NOP     XCR +1
-
-/* Floating point instructions.  */
-
-#define    FADD    NOP +1
-#define    FSUB    NOP +2
-#define    FMUL    NOP +3
-#define    FDIV    NOP +4
-#define    FSQRT   NOP +5
-#define    FCMP    NOP +6
-#define    FIP     NOP +7
-#define    FLT     NOP +8
-#define    INT     NOP +9
-#define    NINT    NOP +10
-#define    TRNC    NOP +11
-#define    FLDC   NOP +12
-#define    FSTC   NOP +13
-#define    FXC    NOP +14
-
-#define UEXT(src,off,wid) \
-  ((((unsigned int)(src)) >> (off)) & ((1 << (wid)) - 1))
-
-#define SEXT(src,off,wid) \
-  (((((int)(src))<<(32 - ((off) + (wid)))) >>(32 - (wid))) )
-
-#define MAKE(src,off,wid) \
-  ((((unsigned int)(src)) & ((1 << (wid)) - 1)) << (off))
-
-#define opword(n) (unsigned long) (memaddr->mem.l)
-
-/* Constants and masks.  */
-
-#define SFU0       0x80000000
-#define SFU1       0x84000000
-#define SFU7       0x9c000000
-#define RRI10      0xf0000000
-#define RRR        0xf4000000
-#define SFUMASK    0xfc00ffe0
-#define RRRMASK    0xfc00ffe0
-#define RRI10MASK  0xfc00fc00
-#define DEFMASK    0xfc000000
-#define CTRL       0x0000f000
-#define CTRLMASK   0xfc00f800
-
-/* Operands types.  */
-
-enum operand_type
-{
-  HEX = 1,
-  REG = 2,
-  CONT = 3,
-  IND = 3,
-  BF = 4,
-  /* Scaled register.  */
-  REGSC = 5,
-  /* Control register.  */
-  CRREG = 6,
-  /* Floating point control register.  */
-  FCRREG = 7,
-  PCREL = 8,
-  CONDMASK = 9,
-  /* Extended register.  */
-  XREG = 10,
-  /* Decimal.  */
-  DEC = 11
-};
-
-/* Hashing specification.  */
-
-#define HASHVAL     79
-
-/* Structure templates.  */
-
-typedef struct
-{
-  unsigned int offset;
-  unsigned int width;
-  enum operand_type type;
-} OPSPEC;
-
-struct SIM_FLAGS
-{
-  int  ltncy,   /* latency (max number of clocks needed to execute).  */
-    extime,   /* execution time (min number of clocks needed to execute).  */
-    wb_pri;   /* writeback slot priority.  */
-  unsigned         op:OP,   /* simulator version of opcode.  */
-    imm_flags:2,   /* 10,16 or 26 bit immediate flags.  */
-    rs1_used:1,   /* register source 1 used.  */
-    rs2_used:1,   /* register source 2 used.  */
-    rsd_used:1,   /* register source/dest used.  */
-    c_flag:1,   /* complement.  */
-    u_flag:1,   /* upper half word.  */
-    n_flag:1,   /* execute next.  */
-    wb_flag:1,   /* uses writeback slot.  */
-    dest_64:1,   /* double precision dest.  */
-    s1_64:1,   /* double precision source 1.  */
-    s2_64:1,   /* double precision source 2.  */
-    scale_flag:1;   /* register is scaled.  */
-};
-
-typedef struct INSTRUCTAB {
-  unsigned int  opcode;
-  char          *mnemonic;
-  OPSPEC        op1,op2,op3;
-  struct SIM_FLAGS flgs;
-} INSTAB;
-\f
-
-#define NO_OPERAND {0,0,0}
-
-extern const INSTAB  instructions[];
-
-/*
- * Local Variables:
- * fill-column: 131
- * End:
- */
diff --git a/ld/ChangeLog b/ld/ChangeLog

index fde757ccc6288a2c5432160c06c419957534a9c4..91fb5152d38f4ec530a54a30355bcc9fe56a29df 100644 (file)
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,14 @@
+2018-04-16  Alan Modra  <amodra@gmail.com>
+
+       * Makefile.am: Remove m88k support.
+       * configure.host: Likewise.
+       * configure.tgt: Likewise.
+       * testsuite/ld-elf/sec-to-seg.exp: Likewise.
+       * emulparams/m88kbcs.sh: Delete.
+       * scripttempl/m88kbcs.sc: Delete.
+       * Makefile.in: Regenerate.
+       * po/BLD-POTFILES.in: Regenerate.
+
  2018-04-16  Alan Modra  <amodra@gmail.com>
  
         * Makefile.am: Remove i370 support.
diff --git a/ld/Makefile.am b/ld/Makefile.am

index 0a6e968a26d404f6e3b52988181ee9291c714e09..39c84f4ad457539e031a4e7855ad377bfcc39f79 100644 (file)
--- a/ld/Makefile.am
+++ b/ld/Makefile.am
@@ -341,7 +341,6 @@ ALL_EMULATION_SOURCES = \
         em68klinux.c \
         em68knbsd.c \
         em68kpsos.c \
-       em88kbcs.c \
         emcorepe.c \
         emn10200.c \
         emn10300.c \
@@ -1511,9 +1510,6 @@ em68knbsd.c:      $(srcdir)/emulparams/m68knbsd.sh \
  em68kpsos.c:   $(srcdir)/emulparams/m68kpsos.sh \
    $(ELF_DEPS) $(srcdir)/scripttempl/psos.sc ${GEN_DEPENDS}
  
-em88kbcs.c: $(srcdir)/emulparams/m88kbcs.sh \
-  $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/m88kbcs.sc ${GEN_DEPENDS}
-
  emcorepe.c: $(srcdir)/emulparams/mcorepe.sh \
    $(srcdir)/emultempl/pe.em $(srcdir)/scripttempl/pe.sc ${GEN_DEPENDS}
  
diff --git a/ld/Makefile.in b/ld/Makefile.in

index 5940945ed2463e87bdb35ea773fc135b17c21f89..85d545c8f9edf95fb387adf59ff1a34fb2799755 100644 (file)
--- a/ld/Makefile.in
+++ b/ld/Makefile.in
@@ -710,7 +710,6 @@ ALL_EMULATION_SOURCES = \
         em68klinux.c \
         em68knbsd.c \
         em68kpsos.c \
-       em88kbcs.c \
         emcorepe.c \
         emn10200.c \
         emn10300.c \
@@ -1356,7 +1355,6 @@ distclean-compile:
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/em68klinux.Po@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/em68knbsd.Po@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/em68kpsos.Po@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/em88kbcs.Po@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/emcorepe.Po@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/emmo.Po@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/emn10200.Po@am__quote@
@@ -3052,9 +3050,6 @@ em68knbsd.c:      $(srcdir)/emulparams/m68knbsd.sh \
  em68kpsos.c:   $(srcdir)/emulparams/m68kpsos.sh \
    $(ELF_DEPS) $(srcdir)/scripttempl/psos.sc ${GEN_DEPENDS}
  
-em88kbcs.c: $(srcdir)/emulparams/m88kbcs.sh \
-  $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/m88kbcs.sc ${GEN_DEPENDS}
-
  emcorepe.c: $(srcdir)/emulparams/mcorepe.sh \
    $(srcdir)/emultempl/pe.em $(srcdir)/scripttempl/pe.sc ${GEN_DEPENDS}
  
diff --git a/ld/configure.host b/ld/configure.host

index 1e128852d27f6c6a6e4880c19fa56f3dda07e57c..cebe36f088dcb7549a6d95854ce086366e569528 100644 (file)
--- a/ld/configure.host
+++ b/ld/configure.host
@@ -24,8 +24,3 @@
  #  HDEFINES            host specific compiler flags
  
  HDEFINES=
-
-case "${host}" in
-     m88*-*-dgux*)
-       HDEFINES=-D__using_DGUX ;;
-esac
diff --git a/ld/configure.tgt b/ld/configure.tgt

index 546cd1a346e1e0e9f4895ab4c78f5d1f0db77867..50da17ac3fe576a46b501c037ce2ad199a97b30c 100644 (file)
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -451,8 +451,6 @@ m68*-*-netbsdaout* | m68*-*-netbsd*)
                         targ_emul=m68knbsd
                         targ_extra_emuls="m68kelfnbsd m68k4knbsd" ;;
  m68*-*-psos*)          targ_emul=m68kpsos ;;
-m8*-*-*)               targ_emul=m88kbcs
-                       ;;
  mcore-*-pe)            targ_emul=mcorepe ;
                         targ_extra_ofiles="deffilep.o pe-dll.o" ;;
  mcore-*-elf)           targ_emul=elf32mcore
diff --git a/ld/emulparams/m88kbcs.sh b/ld/emulparams/m88kbcs.sh

deleted file mode 100644 (file)

index d48a1eb..0000000
--- a/ld/emulparams/m88kbcs.sh
+++ /dev/null
@@ -1,5 +0,0 @@
-SCRIPT_NAME=m88kbcs
-OUTPUT_FORMAT="coff-m88kbcs"
-TEXT_START_ADDR=0
-TARGET_PAGE_SIZE=128
-ARCH=m88k
diff --git a/ld/po/BLD-POTFILES.in b/ld/po/BLD-POTFILES.in

index ac4b42a2587959b593614646abd891b84dce8f9a..8c326ef96ebca6c98ba9fc0febc6eec0a6ef8f71 100644 (file)
--- a/ld/po/BLD-POTFILES.in
+++ b/ld/po/BLD-POTFILES.in
@@ -257,7 +257,6 @@ em68kelfnbsd.c
  em68klinux.c
  em68knbsd.c
  em68kpsos.c
-em88kbcs.c
  emcorepe.c
  emmo.c
  emn10200.c
diff --git a/ld/scripttempl/m88kbcs.sc b/ld/scripttempl/m88kbcs.sc

deleted file mode 100644 (file)

index 1c71685..0000000
--- a/ld/scripttempl/m88kbcs.sc
+++ /dev/null
@@ -1,62 +0,0 @@
-# Copyright (C) 2014-2018 Free Software Foundation, Inc.
-#
-# Copying and distribution of this file, with or without modification,
-# are permitted in any medium without royalty provided the copyright
-# notice and this notice are preserved.
-
-# These are substituted in as variables in order to get '}' in a shell
-# conditional expansion.
-INIT='.init : { *(.init) }'
-FINI='.fini : { *(.fini) }'
-
-cat <<EOF
-/* Copyright (C) 2014-2018 Free Software Foundation, Inc.
-
-   Copying and distribution of this script, with or without modification,
-   are permitted in any medium without royalty provided the copyright
-   notice and this notice are preserved.  */
-
-OUTPUT_FORMAT("${OUTPUT_FORMAT}")
-OUTPUT_ARCH(${ARCH})
-${RELOCATING+ENTRY (__start)}
-${RELOCATING+${LIB_SEARCH_DIRS}}
-
-SECTIONS
-{
-  .text ${RELOCATING+ (0x20007 + SIZEOF_HEADERS) &~ 7} :
-    {
-      ${RELOCATING+ __.text.start = .};
-      ${RELOCATING+ __.init.start = .};
-      ${RELOCATING+ *(.init)}
-      ${RELOCATING+ __.init.end = .};
-      *(.text)
-      ${RELOCATING+ __.tdesc_start = .};
-      ${RELOCATING+ *(.tdesc)}
-      ${RELOCATING+ __.text_end = .}   ;
-      ${RELOCATING+ __.initp.start = .};
-      ${RELOCATING+ __.initp.end = .};
-      ${RELOCATING+ __.fini_start = .};
-      ${RELOCATING+ *(.fini) }
-      ${RELOCATING+ __.fini_end = .};
-      ${RELOCATING+_etext = .};
-    }
-  .data ${RELOCATING+ NEXT (0x400000) + ((SIZEOF(.text) + ADDR(.text)) % 0x2000)} :
-    {
-      *(.data)
-      ${RELOCATING+_edata  =  .};
-    }
-  .bss ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} :
-    {
-      *(.bss)
-      *(COMMON)
-      ${RELOCATING+ _end = .};
-      ${RELOCATING+ __end = .};
-    }
-  ${RELOCATING- ${INIT}}
-  ${RELOCATING- ${FINI}}
-  .comment  0 ${RELOCATING+(NOLOAD)} :
-  {
-    *(.comment)
-  }
-}
-EOF
diff --git a/ld/testsuite/ld-elf/sec-to-seg.exp b/ld/testsuite/ld-elf/sec-to-seg.exp

index becad1bfebbba26c4bc13326e738a169a2d6af53..6d90808fbf934e05b884f3102b74eb00b2a26616 100644 (file)
--- a/ld/testsuite/ld-elf/sec-to-seg.exp
+++ b/ld/testsuite/ld-elf/sec-to-seg.exp
@@ -82,7 +82,6 @@ if {    [istarget avr-*-*]
       || [istarget h8300-*-*]
       || [istarget ip2k-*-*]
       || [istarget m32r-*-*]
-     || [istarget m88k-*-*]
       || [istarget moxie-*-*]
       || [istarget msp430-*-*]
       || [istarget mt-*-*]
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog

index af1250fa37343a4e0bfbaf41fc556f21c2371e97..027ad6932a6bc6c47dcdd6125b69b5588441dcb3 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,14 @@
+2018-04-16  Alan Modra  <amodra@gmail.com>
+
+       * Makefile.am: Remove m88k support.
+       * configure.ac: Likewise.
+       * disassemble.c: Likewise.
+       * disassemble.h: Likewise.
+       * m88k-dis.c: Delete.
+       * Makefile.in: Regenerate.
+       * configure: Regenerate.
+       * po/POTFILES.in: Regenerate.
+
  2018-04-16  Alan Modra  <amodra@gmail.com>
  
         * Makefile.am: Remove i370 support.
diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am

index 7262dcc4fca7cd4c6640e3c7f83bc136a006b76e..83303fcfe2a5acc3a3b426c7a3509a1075de1468 100644 (file)
--- a/opcodes/Makefile.am
+++ b/opcodes/Makefile.am
@@ -177,7 +177,6 @@ TARGET_LIBOPCODES_CFILES = \
         m68hc11-opc.c \
         m68k-dis.c \
         m68k-opc.c \
-       m88k-dis.c \
         mcore-dis.c \
         mep-asm.c \
         mep-desc.c \
diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in

index d7c3a3b08812be02e1dd1c56bd7b0b24980839a8..bdf9e37241cf903981969d6835a488e80717cc9a 100644 (file)
--- a/opcodes/Makefile.in
+++ b/opcodes/Makefile.in
@@ -479,7 +479,6 @@ TARGET_LIBOPCODES_CFILES = \
         m68hc11-opc.c \
         m68k-dis.c \
         m68k-opc.c \
-       m88k-dis.c \
         mcore-dis.c \
         mep-asm.c \
         mep-desc.c \
@@ -883,7 +882,6 @@ distclean-compile:
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m68hc11-opc.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m68k-dis.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m68k-opc.Plo@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m88k-dis.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mcore-dis.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-asm.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-desc.Plo@am__quote@
diff --git a/opcodes/configure b/opcodes/configure

index 496e2dc90323003017bbaf55589e3783d353dc44..23153460b403eec590789f348727e6416273f77c 100755 (executable)
--- a/opcodes/configure
+++ b/opcodes/configure
@@ -12660,7 +12660,6 @@ if test x${all_targets} = xfalse ; then
         bfd_m9s12x_arch)        ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
         bfd_m9s12xg_arch)       ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
         bfd_m68k_arch)          ta="$ta m68k-dis.lo m68k-opc.lo" ;;
-       bfd_m88k_arch)          ta="$ta m88k-dis.lo" ;;
         bfd_mcore_arch)         ta="$ta mcore-dis.lo" ;;
         bfd_mep_arch)           ta="$ta mep-asm.lo mep-desc.lo mep-dis.lo mep-ibld.lo mep-opc.lo" using_cgen=yes ;;
         bfd_metag_arch)         ta="$ta metag-dis.lo" ;;
diff --git a/opcodes/configure.ac b/opcodes/configure.ac

index 9e76e96986944510dc6d6b9c4262816e53893ea7..558a4e97ef7f329e40a45eb56d9cd68d75ed1f6d 100644 (file)
--- a/opcodes/configure.ac
+++ b/opcodes/configure.ac
@@ -284,7 +284,6 @@ if test x${all_targets} = xfalse ; then
         bfd_m9s12x_arch)        ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
         bfd_m9s12xg_arch)       ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
         bfd_m68k_arch)          ta="$ta m68k-dis.lo m68k-opc.lo" ;;
-       bfd_m88k_arch)          ta="$ta m88k-dis.lo" ;;
         bfd_mcore_arch)         ta="$ta mcore-dis.lo" ;;
         bfd_mep_arch)           ta="$ta mep-asm.lo mep-desc.lo mep-dis.lo mep-ibld.lo mep-opc.lo" using_cgen=yes ;;
         bfd_metag_arch)         ta="$ta metag-dis.lo" ;;
diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c

index 0dbcc8295af1b1fe88f9e66c5ec945e9a470b87c..9c58db7ec9d99e9e01142d812b53275e08e01ebc 100644 (file)
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -52,7 +52,6 @@
  #define ARCH_m68hc11
  #define ARCH_m68hc12
  #define ARCH_m68k
-#define ARCH_m88k
  #define ARCH_mcore
  #define ARCH_mep
  #define ARCH_metag
@@ -258,11 +257,6 @@ disassembler (enum bfd_architecture a,
        disassemble = print_insn_m68k;
        break;
  #endif
-#ifdef ARCH_m88k
-    case bfd_arch_m88k:
-      disassemble = print_insn_m88k;
-      break;
-#endif
  #ifdef ARCH_mt
      case bfd_arch_mt:
        disassemble = print_insn_mt;
diff --git a/opcodes/disassemble.h b/opcodes/disassemble.h

index 1912e88313c9a36d4f235ee06427a1793cdd6997..2fea54fbc761748f3f1770c99926b2e5e60a9e06 100644 (file)
--- a/opcodes/disassemble.h
+++ b/opcodes/disassemble.h
@@ -62,7 +62,6 @@ extern int print_insn_m68hc12         (bfd_vma, disassemble_info *);
  extern int print_insn_m9s12x           (bfd_vma, disassemble_info *);
  extern int print_insn_m9s12xg          (bfd_vma, disassemble_info *);
  extern int print_insn_m68k             (bfd_vma, disassemble_info *);
-extern int print_insn_m88k             (bfd_vma, disassemble_info *);
  extern int print_insn_mcore            (bfd_vma, disassemble_info *);
  extern int print_insn_metag            (bfd_vma, disassemble_info *);
  extern int print_insn_microblaze       (bfd_vma, disassemble_info *);
diff --git a/opcodes/m88k-dis.c b/opcodes/m88k-dis.c

deleted file mode 100644 (file)

index da40b0f..0000000
--- a/opcodes/m88k-dis.c
+++ /dev/null
@@ -1,762 +0,0 @@
-/* Print instructions for the Motorola 88000, for GDB and GNU Binutils.
-   Copyright (C) 1986-2018 Free Software Foundation, Inc.
-   Contributed by Data General Corporation, November 1989.
-   Partially derived from an earlier printcmd.c.
-
-   This file is part of the GNU opcodes library.
-
-   This library is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3, or (at your option)
-   any later version.
-
-   It is distributed in the hope that it will be useful, but WITHOUT
-   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
-   License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-   MA 02110-1301, USA.  */
-
-#include "sysdep.h"
-#include "disassemble.h"
-#include "opcode/m88k.h"
-#include "opintl.h"
-#include "libiberty.h"
-
-typedef struct HASHTAB
-{
-  const INSTAB  *instr;
-  struct HASHTAB *next;
-} HASHTAB;
-
-/* Opcode     Mnemonic       Op 1 Spec     Op 2 Spec    Op 3 Spec         Simflags             Next  */
-
-const INSTAB  instructions[] =
-{
-  {0xf400c800,"jsr         ",{0,5,REG}   ,NO_OPERAND      ,NO_OPERAND   , {2,2,NA,JSR ,          0,0,1,0,0,0,0,1,0,0,0,0} },
-  {0xf400cc00,"jsr.n       ",{0,5,REG}   ,NO_OPERAND      ,NO_OPERAND   , {1,1,NA,JSR ,          0,0,1,0,0,0,1,1,0,0,0,0} },
-  {0xf400c000,"jmp         ",{0,5,REG}   ,NO_OPERAND      ,NO_OPERAND   , {2,2,NA,JMP ,          0,0,1,0,0,0,0,1,0,0,0,0} },
-  {0xf400c400,"jmp.n       ",{0,5,REG}   ,NO_OPERAND      ,NO_OPERAND   , {1,1,NA,JMP ,          0,0,1,0,0,0,1,1,0,0,0,0} },
-  {0xc8000000,"bsr         ",{0,26,PCREL},NO_OPERAND      ,NO_OPERAND   , {2,2,NA,BSR ,     i26bit,0,0,0,0,0,0,1,0,0,0,0} },
-  {0xcc000000,"bsr.n       ",{0,26,PCREL},NO_OPERAND      ,NO_OPERAND   , {1,1,NA,BSR ,     i26bit,0,0,0,0,0,1,1,0,0,0,0} },
-  {0xc0000000,"br          ",{0,26,PCREL},NO_OPERAND      ,NO_OPERAND   , {2,2,NA,BR  ,     i26bit,0,0,0,0,0,0,1,0,0,0,0} },
-  {0xc4000000,"br.n        ",{0,26,PCREL},NO_OPERAND      ,NO_OPERAND   , {1,1,NA,BR  ,     i26bit,0,0,0,0,0,1,1,0,0,0,0} },
-  {0xd0000000,"bb0         ",{21,5,HEX}  ,{16,5,REG}   ,{0,16,PCREL},{2,2,NA,BB0,     i16bit,0,1,0,0,0,0,1,0,0,0,0} },
-  {0xd4000000,"bb0.n       ",{21,5,HEX}  ,{16,5,REG}   ,{0,16,PCREL},{1,1,NA,BB0,     i16bit,0,1,0,0,0,1,1,0,0,0,0} },
-  {0xd8000000,"bb1         ",{21,5,HEX},{16,5,REG}     ,{0,16,PCREL},{2,2,NA,BB1,     i16bit,0,1,0,0,0,0,1,0,0,0,0} },
-  {0xdc000000,"bb1.n       ",{21,5,HEX},{16,5,REG}     ,{0,16,PCREL},{1,1,NA,BB1,     i16bit,0,1,0,0,0,1,1,0,0,0,0} },
-  {0xf000d000,"tb0         ",{21,5,HEX}  ,{16,5,REG}   ,{0,10,HEX}, {2,2,NA,TB0 ,     i10bit,0,1,0,0,0,0,1,0,0,0,0} },
-  {0xf000d800,"tb1         ",{21,5,HEX}  ,{16,5,REG}   ,{0,10,HEX}, {2,2,NA,TB1 ,     i10bit,0,1,0,0,0,0,1,0,0,0,0} },
-  {0xe8000000,"bcnd        ",{21,5,CONDMASK},{16,5,REG},{0,16,PCREL},{2,2,NA,BCND,    i16bit,0,1,0,0,0,0,1,0,0,0,0} },
-  {0xec000000,"bcnd.n      ",{21,5,CONDMASK},{16,5,REG},{0,16,PCREL},{1,1,NA,BCND,    i16bit,0,1,0,0,0,1,1,0,0,0,0} },
-  {0xf000e800,"tcnd        ",{21,5,CONDMASK},{16,5,REG},{0,10,HEX}, {2,2,NA,TCND,     i10bit,0,1,0,0,0,0,1,0,0,0,0} },
-  {0xf8000000,"tbnd        ",{16,5,REG}  ,{0,16,HEX}   ,NO_OPERAND   , {2,2,NA,TBND,     i10bit,1,0,0,0,0,0,1,0,0,0,0} },
-  {0xf400f800,"tbnd        ",{16,5,REG}  ,{0,5,REG}    ,NO_OPERAND   , {2,2,NA,TBND,          0,1,1,0,0,0,0,1,0,0,0,0} },
-  {0xf400fc00,"rte         ",NO_OPERAND     ,NO_OPERAND      ,NO_OPERAND   , {2,2,NA,RTE ,          0,0,0,0,0,0,0,1,0,0,0,0} },
-  {0x1c000000,"ld.b        ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {3,1,PMEM,LDB    ,i16bit,1,0,1,0,0,0,1,0,0,0,0} },
-  {0xf4001c00,"ld.b        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {3,1,PMEM,LDB     ,    0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0x0c000000,"ld.bu       ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {3,1,PMEM,LDBU,   i16bit,1,0,1,0,0,0,1,0,0,0,0} },
-  {0xf4000c00,"ld.bu       ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {3,1,PMEM,LDBU        ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0x18000000,"ld.h        ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {3,1,PMEM,LDH    ,i16bit,1,0,1,0,0,0,1,0,0,0,0} },
-  {0xf4001800,"ld.h        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {3,1,PMEM,LDH         ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0xf4001a00,"ld.h        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{3,1,PMEM,LDH         ,0,1,1,1,0,0,0,1,0,0,0,1} },
-  {0x08000000,"ld.hu       ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {3,1,PMEM,LDHU,   i16bit,1,0,1,0,0,0,1,0,0,0,0} },
-  {0xf4000800,"ld.hu       ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {3,1,PMEM,LDHU        ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0xf4000a00,"ld.hu       ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{3,1,PMEM,LDHU        ,0,1,1,1,0,0,0,1,0,0,0,1} },
-  {0x14000000,"ld          ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {3,1,PMEM,LD     ,i16bit,1,0,1,0,0,0,1,0,0,0,0} },
-  {0xf4001400,"ld          ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {3,1,PMEM,LD          ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0xf4001600,"ld          ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{3,1,PMEM,LD          ,0,1,1,1,0,0,0,1,0,0,0,1} },
-  {0x10000000,"ld.d        ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {3,1,PMEM,LDD    ,i16bit,1,0,1,0,0,0,1,0,0,0,0} },
-  {0xf4001000,"ld.d        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {3,1,PMEM,LDD         ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0xf4001200,"ld.d        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{3,1,PMEM,LDD         ,0,1,1,1,0,0,0,1,0,0,0,1} },
-  {0xf4001500,"ld.usr      ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {3,1,PMEM,LD          ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0xf4001700,"ld.usr      ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{3,1,PMEM,LD          ,0,1,1,1,0,0,0,1,0,0,0,1} },
-  {0x2c000000,"st.b        ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,NA,STB      ,i16bit,1,0,1,0,0,0,1,0,0,0,0} },
-  {0xf4002c00,"st.b        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,NA,STB           ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0x28000000,"st.h        ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,NA,STH      ,i16bit,1,0,1,0,0,0,1,0,0,0,0} },
-  {0xf4002800,"st.h        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,NA,STH           ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0xf4002a00,"st.h        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{1,1,NA,STH           ,0,1,1,1,0,0,0,1,0,0,0,1} },
-  {0x24000000,"st          ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,NA,ST       ,i16bit,1,0,1,0,0,0,1,0,0,0,0} },
-  {0xf4002400,"st          ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,NA,ST            ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0xf4002600,"st          ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{1,1,NA,ST            ,0,1,1,1,0,0,0,1,0,0,0,1} },
-  {0x20000000,"st.d        ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,NA,STD      ,i16bit,0,1,0,0,0,0,1,0,0,0,0} },
-  {0xf4002000,"st.d        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,NA,STD           ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0xf4002200,"st.d        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{1,1,NA,STD           ,0,1,1,1,0,0,0,1,0,0,0,1} },
-  {0xf4002500,"st.usr      ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,NA,ST            ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0xf4002700,"st.usr      ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{1,1,NA,ST            ,0,1,1,1,0,0,0,1,0,0,0,1} },
-/*  m88100 only:
-  {0x00000000,"xmem.bu     ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {3,1,PMEM,XMEMBU ,i16bit,1,1,1,0,0,0,1,0,0,0,0} },
- */
-  {0xf4000000,"xmem.bu     ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {3,1,PMEM,XMEM        ,0,1,1,1,0,0,0,1,0,0,0,0} },
-/*  m88100 only:
-  {0x04000000,"xmem        ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {3,1,PMEM,XMEM   ,i16bit,1,1,1,0,0,0,1,0,0,0,0} },
- */
-  {0xf4000400,"xmem        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {3,1,PMEM,XMEM        ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0xf4000600,"xmem        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{3,1,PMEM,XMEM        ,0,1,1,1,0,0,0,1,0,0,0,1} },
-  {0xf4000500,"xmem.usr    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {3,1,PMEM,XMEM        ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0xf4000700,"xmem.usr    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{3,1,PMEM,XMEM        ,0,1,1,1,0,0,0,1,0,0,0,1} },
-/* m88100 only:
-  {0xf4003e00,"lda.b       ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{1,1,PINT,LDAH,        0,1,1,1,0,0,0,0,0,0,0,1} },
- */
-  {0xf4003e00,"lda.x       ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{1,1,PINT,LDAH,        0,1,1,1,0,0,0,0,0,0,0,1} },
-  {0xf4003a00,"lda.h       ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{1,1,PINT,LDAH,        0,1,1,1,0,0,0,0,0,0,0,1} },
-  {0xf4003600,"lda         ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{1,1,PINT,LDA ,        0,1,1,1,0,0,0,0,0,0,0,1} },
-  {0xf4003200,"lda.d       ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REGSC},{1,1,PINT,LDAD,        0,1,1,1,0,0,0,0,0,0,0,1} },
-
-  {0x80004000,"ldcr        ",{21,5,REG}  ,{5,6,CRREG}  ,NO_OPERAND    ,{1,1,PINT,LDCR,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0x80008000,"stcr        ",{16,5,REG}  ,{5,6,CRREG}  ,NO_OPERAND    ,{1,1,PINT,STCR,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0x8000c000,"xcr         ",{21,5,REG}  ,{16,5,REG}   ,{5,6,CRREG},{1,1,PINT,XCR,         0,1,1,1,0,0,0,0,0,0,0,0} },
-
-  {0xf4006000,"addu        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,ADDU,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4006200,"addu.ci     ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,ADDU,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4006100,"addu.co     ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,ADDU,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4006300,"addu.cio    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,ADDU,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4006400,"subu        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,SUBU,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4006600,"subu.ci     ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,SUBU,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4006500,"subu.co     ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,SUBU,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4006700,"subu.cio    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,SUBU,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4006800,"divu        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {32,32,PINT,DIVU,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4006900,"divu.d      ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,} },
-  {0xf4006e00,"muls        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,} },
-  {0xf4006c00,"mulu        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,4,PINT,MUL,      0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4007000,"add         ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,ADD ,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4007200,"add.ci      ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,ADD ,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4007100,"add.co      ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,ADD ,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4007300,"add.cio     ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,ADD ,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4007400,"sub         ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,SUB ,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4007600,"sub.ci      ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,SUB ,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4007500,"sub.co      ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,SUB ,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4007700,"sub.cio     ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,SUB ,        0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4007800,"divs        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {32,32,PINT,DIV ,      0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4007c00,"cmp         ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,CMP,         0,1,1,1,0,0,0,0,0,0,0,0} },
-
-  {0x60000000,"addu        ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,PINT,ADDU,   i16bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0x64000000,"subu        ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,PINT,SUBU,   i16bit,1,0,1,0,0,0,0,0,0,0,0} },
-
-  {0x68000000,"divu        ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {32,32,PINT,DIVU, i16bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0x6c000000,"mulu        ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {4,1,PINT,MUL,    i16bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0x70000000,"add         ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,PINT,ADD,    i16bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0x74000000,"sub         ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,PINT,SUB,    i16bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0x78000000,"divs        ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {32,32,PINT,DIV,  i16bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0x7c000000,"cmp         ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,PINT,CMP,    i16bit,1,0,1,0,0,0,0,0,0,0,0} },
-
-  {0xf4004000,"and         ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,AND_        ,0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4004400,"and.c       ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,AND_        ,0,1,1,1,1,0,0,0,0,0,0,0} },
-  {0xf4005800,"or          ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,OR          ,0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4005c00,"or.c        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,OR          ,0,1,1,1,1,0,0,0,0,0,0,0} },
-  {0xf4005000,"xor         ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,XOR         ,0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4005400,"xor.c       ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,XOR         ,0,1,1,1,1,0,0,0,0,0,0,0} },
-  {0x40000000,"and         ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,PINT,AND_   ,i16bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0x44000000,"and.u       ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,PINT,AND_   ,i16bit,1,0,1,0,1,0,0,0,0,0,0} },
-  {0x58000000,"or          ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,PINT,OR     ,i16bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0x5c000000,"or.u        ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,PINT,OR     ,i16bit,1,0,1,0,1,0,0,0,0,0,0} },
-  {0x50000000,"xor         ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,PINT,XOR    ,i16bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0x54000000,"xor.u       ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,PINT,XOR    ,i16bit,1,0,1,0,1,0,0,0,0,0,0} },
-  {0x48000000,"mask        ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,PINT,MASK   ,i16bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0x4c000000,"mask.u      ",{21,5,REG}  ,{16,5,REG}   ,{0,16,HEX}, {1,1,PINT,MASK   ,i16bit,1,0,1,0,1,0,0,0,0,0,0} },
-  {0xf400ec00,"ff0         ",{21,5,REG}  ,{0,5,REG}    ,NO_OPERAND   , {1,1,PINT,FF0         ,0,0,1,1,0,0,0,0,0,0,0,0} },
-  {0xf400e800,"ff1         ",{21,5,REG}  ,{0,5,REG}    ,NO_OPERAND   , {1,1,PINT,FF1         ,0,0,1,1,0,0,0,0,0,0,0,0} },
-  {0xf0008000,"clr         ",{21,5,REG}  ,{16,5,REG}   ,{0,10,BF} , {1,1,PINT,CLR    ,i10bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0xf0008800,"set         ",{21,5,REG}  ,{16,5,REG}   ,{0,10,BF} , {1,1,PINT,SET    ,i10bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0xf0009000,"ext         ",{21,5,REG}  ,{16,5,REG}   ,{0,10,BF} , {1,1,PINT,EXT    ,i10bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0xf0009800,"extu        ",{21,5,REG}  ,{16,5,REG}   ,{0,10,BF} , {1,1,PINT,EXTU   ,i10bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0xf000a000,"mak         ",{21,5,REG}  ,{16,5,REG}   ,{0,10,BF} , {1,1,PINT,MAK    ,i10bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0xf000a800,"rot         ",{21,5,REG}  ,{16,5,REG}   ,{0,10,BF} , {1,1,PINT,ROT    ,i10bit,1,0,1,0,0,0,0,0,0,0,0} },
-  {0xf4008000,"clr         ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,CLR         ,0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4008800,"set         ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,SET         ,0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4009000,"ext         ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,EXT         ,0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf4009800,"extu        ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,EXTU        ,0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf400a000,"mak         ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,MAK         ,0,1,1,1,0,0,0,0,0,0,0,0} },
-  {0xf400a800,"rot         ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {1,1,PINT,ROT         ,0,1,1,1,0,0,0,0,0,0,0,0} },
-
-  {0x84002800,"fadd.sss    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {5,1,PFLT,FADD        ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0x84002880,"fadd.ssd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,2,PFLT,FADD        ,0,1,1,1,0,0,0,1,0,0,1,0} },
-  {0x84002a00,"fadd.sds    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,2,PFLT,FADD        ,0,1,1,1,0,0,0,1,0,1,0,0} },
-  {0x84002a80,"fadd.sdd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,2,PFLT,FADD        ,0,1,1,1,0,0,0,1,0,1,1,0} },
-  {0x84002820,"fadd.dss    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,2,PFLT,FADD        ,0,1,1,1,0,0,0,1,1,0,0,0} },
-  {0x840028a0,"fadd.dsd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,2,PFLT,FADD        ,0,1,1,1,0,0,0,1,1,0,1,0} },
-  {0x84002a20,"fadd.dds    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,2,PFLT,FADD        ,0,1,1,1,0,0,0,1,1,1,0,0} },
-  {0x84002aa0,"fadd.ddd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,2,PFLT,FADD        ,0,1,1,1,0,0,0,1,1,1,1,0} },
-  {0x84003000,"fsub.sss    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {5,1,PFLT,FSUB        ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0x84003080,"fsub.ssd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,2,PFLT,FSUB        ,0,1,1,1,0,0,0,1,0,0,1,0} },
-  {0x84003200,"fsub.sds    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,2,PFLT,FSUB        ,0,1,1,1,0,0,0,1,0,1,0,0} },
-  {0x84003280,"fsub.sdd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,2,PFLT,FSUB        ,0,1,1,1,0,0,0,1,0,1,1,0} },
-  {0x84003020,"fsub.dss    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,2,PFLT,FSUB        ,0,1,1,1,0,0,0,1,1,0,0,0} },
-  {0x840030a0,"fsub.dsd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,2,PFLT,FSUB        ,0,1,1,1,0,0,0,1,1,0,1,0} },
-  {0x84003220,"fsub.dds    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,2,PFLT,FSUB        ,0,1,1,1,0,0,0,1,1,1,0,0} },
-  {0x840032a0,"fsub.ddd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,2,PFLT,FSUB        ,0,1,1,1,0,0,0,1,1,1,1,0} },
-  {0x84000000,"fmul.sss    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,1,PFLT,FMUL        ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0x84000080,"fmul.ssd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {9,2,PFLT,FMUL        ,0,1,1,1,0,0,0,1,0,0,1,0} },
-  {0x84000200,"fmul.sds    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {9,2,PFLT,FMUL        ,0,1,1,1,0,0,0,1,0,1,0,0} },
-  {0x84000280,"fmul.sdd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {9,2,PFLT,FMUL        ,0,1,1,1,0,0,0,1,0,1,1,0} },
-  {0x84000020,"fmul.dss    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {9,2,PFLT,FMUL        ,0,1,1,1,0,0,0,1,1,0,0,0} },
-  {0x840000a0,"fmul.dsd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {9,2,PFLT,FMUL        ,0,1,1,1,0,0,0,1,1,0,1,0} },
-  {0x84000220,"fmul.dds    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {9,2,PFLT,FMUL        ,0,1,1,1,0,0,0,1,1,1,0,0} },
-  {0x840002a0,"fmul.ddd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {9,2,PFLT,FMUL        ,0,1,1,1,0,0,0,1,1,1,1,0} },
-  {0x84007000,"fdiv.sss    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {30,30,PFLT,FDIV      ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0x84007080,"fdiv.ssd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {60,60,PFLT,FDIV      ,0,1,1,1,0,0,0,1,0,0,1,0} },
-  {0x84007200,"fdiv.sds    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {60,60,PFLT,FDIV      ,0,1,1,1,0,0,0,1,0,1,0,0} },
-  {0x84007280,"fdiv.sdd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {60,60,PFLT,FDIV      ,0,1,1,1,0,0,0,1,0,1,1,0} },
-  {0x84007020,"fdiv.dss    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {60,60,PFLT,FDIV      ,0,1,1,1,0,0,0,1,1,0,0,0} },
-  {0x840070a0,"fdiv.dsd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {60,60,PFLT,FDIV      ,0,1,1,1,0,0,0,1,1,0,1,0} },
-  {0x84007220,"fdiv.dds    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {60,60,PFLT,FDIV      ,0,1,1,1,0,0,0,1,1,1,0,0} },
-  {0x840072a0,"fdiv.ddd    ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {60,60,PFLT,FDIV      ,0,1,1,1,0,0,0,1,1,1,1,0} },
-  {0x84007800,"fsqrt.ss    ",{21,5,REG}  ,{0,5,REG}    ,NO_OPERAND   , {5,1,PFLT,FLT         ,0,0,1,1,0,0,0,1,0,0,0,0} },
-  {0x84007820,"fsqrt.sd    ",{21,5,REG}  ,{0,5,REG}    ,NO_OPERAND   , {5,1,PFLT,FLT         ,0,0,1,1,0,0,0,1,0,0,0,0} },
-  {0x84007880,"fsqrt.ds    ",{21,5,REG}  ,{0,5,REG}    ,NO_OPERAND   , {5,1,PFLT,FLT         ,0,0,1,1,0,0,0,1,0,0,0,0} },
-  {0x840078a0,"fsqrt.dd    ",{21,5,REG}  ,{0,5,REG}    ,NO_OPERAND   , {6,1,PFLT,FLT         ,0,0,1,1,0,0,0,1,1,0,0,0} },
-  {0x84003800,"fcmp.ss     ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {5,1,PFLT,FCMP        ,0,1,1,1,0,0,0,1,0,0,0,0} },
-  {0x84003880,"fcmp.sd     ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,1,PFLT,FCMP        ,0,1,1,1,0,0,0,1,0,1,0,0} },
-  {0x84003a00,"fcmp.ds     ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,1,PFLT,FCMP        ,0,1,1,1,0,0,0,1,1,0,0,0} },
-  {0x84003a80,"fcmp.dd     ",{21,5,REG}  ,{16,5,REG}   ,{0,5,REG} , {6,1,PFLT,FCMP        ,0,1,1,1,0,0,0,1,1,1,0,0} },
-  {0x84002000,"flt.s       ",{21,5,REG}  ,{0,5,REG}    ,NO_OPERAND   , {5,1,PFLT,FLT         ,0,0,1,1,0,0,0,1,0,0,0,0} },
-  {0x84002020,"flt.d       ",{21,5,REG}  ,{0,5,REG}    ,NO_OPERAND   , {6,1,PFLT,FLT         ,0,0,1,1,0,0,0,1,1,0,0,0} },
-  {0x84004800,"int.s       ",{21,5,REG}  ,{0,5,REG}    ,NO_OPERAND   , {5,1,PFLT,INT         ,0,0,1,1,0,0,0,1,0,0,0,0} },
-  {0x84004880,"int.d       ",{21,5,REG}  ,{0,5,REG}    ,NO_OPERAND   , {6,1,PFLT,INT         ,0,0,1,1,0,0,0,1,1,0,0,0} },
-  {0x84005000,"nint.s      ",{21,5,REG}  ,{0,5,REG}    ,NO_OPERAND   , {5,1,PFLT,INT         ,0,0,1,1,0,0,0,1,0,0,0,0} },
-  {0x84005080,"nint.d      ",{21,5,REG}  ,{0,5,REG}    ,NO_OPERAND   , {6,1,PFLT,INT         ,0,0,1,1,0,0,0,1,1,0,0,0} },
-  {0x84005800,"trnc.s      ",{21,5,REG}  ,{0,5,REG}    ,NO_OPERAND   , {5,1,PFLT,TRNC        ,0,0,1,1,0,0,0,1,0,0,0,0} },
-  {0x84005880,"trnc.d      ",{21,5,REG}  ,{0,5,REG}    ,NO_OPERAND   , {6,1,PFLT,TRNC        ,0,0,1,1,0,0,0,1,1,0,0,0} },
-
-  {0x80004800,"fldcr       ",{21,5,REG}  ,{5,6,FCRREG} ,NO_OPERAND   , {1,1,PFLT,FLDC        ,0,0,1,1,0,0,0,1,0,0,0,0} },
-  {0x80008800,"fstcr       ",{16,5,REG}  ,{5,6,FCRREG} ,NO_OPERAND   , {1,1,PFLT,FSTC        ,0,0,1,1,0,0,0,1,0,0,0,0} },
-  {0x8000c800,"fxcr        ",{21,5,REG}  ,{16,5,REG}   ,{5,6,FCRREG} , {1,1,PFLT,FXC         ,0,0,1,1,0,0,0,1,0,0,0,0} },
-
-/* The following are new for the 88110.  */
-
-  {0x8400aaa0,"fadd.ddd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400aa80,"fadd.dds    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400aac0,"fadd.ddx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400aa20,"fadd.dsd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400aa00,"fadd.dss    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400aa40,"fadd.dsx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400ab20,"fadd.dxd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400ab00,"fadd.dxs    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400ab40,"fadd.dxx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400a8a0,"fadd.sdd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400a880,"fadd.sds    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400a8c0,"fadd.sdx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400a820,"fadd.ssd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400a800,"fadd.sss    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400a840,"fadd.ssx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400a920,"fadd.sxd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400a900,"fadd.sxs    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400a940,"fadd.sxx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400aca0,"fadd.xdd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400ac80,"fadd.xds    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400acc0,"fadd.xdx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400ac20,"fadd.xsd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400ac00,"fadd.xss    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400ac40,"fadd.xsx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400ad20,"fadd.xxd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400ad00,"fadd.xxs    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400ad40,"fadd.xxx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x8400ba80,"fcmp.sdd    ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400ba00,"fcmp.sds    ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400bb00,"fcmp.sdx    ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b880,"fcmp.ssd    ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b800,"fcmp.sss    ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b900,"fcmp.ssx    ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400bc80,"fcmp.sxd    ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400bc00,"fcmp.sxs    ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400bd00,"fcmp.sxx    ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x8400baa0,"fcmpu.sdd   ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400ba20,"fcmpu.sds   ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400bb20,"fcmpu.sdx   ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b8a0,"fcmpu.ssd   ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b820,"fcmpu.sss   ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b920,"fcmpu.ssx   ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400bca0,"fcmpu.sxd   ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400bc20,"fcmpu.sxs   ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400bd20,"fcmpu.sxx   ",{21,5,REG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x84000820,"fcvt.ds     ",{21,5,REG} ,{0,5,REG}  ,NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84000880,"fcvt.sd     ",{21,5,REG} ,{0,5,REG}  ,NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x84008880,"fcvt.sd     ",{21,5,XREG} ,{0,5,XREG}  ,NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x840088c0,"fcvt.xd     ",{21,5,XREG} ,{0,5,XREG}  ,NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008820,"fcvt.ds     ",{21,5,XREG} ,{0,5,XREG}  ,NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008840,"fcvt.xs     ",{21,5,XREG} ,{0,5,XREG}  ,NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008920,"fcvt.dx     ",{21,5,XREG} ,{0,5,XREG}  ,NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008900,"fcvt.sx     ",{21,5,XREG} ,{0,5,XREG}  ,NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x8400f2a0,"fdiv.ddd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f280,"fdiv.dds    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f2c0,"fdiv.ddx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f220,"fdiv.dsd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f200,"fdiv.dss    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f240,"fdiv.dsx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f320,"fdiv.dxd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f300,"fdiv.dxs    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f340,"fdiv.dxx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f0a0,"fdiv.sdd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f080,"fdiv.sds    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f0c0,"fdiv.sdx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f020,"fdiv.ssd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f000,"fdiv.sss    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f040,"fdiv.ssx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f120,"fdiv.sxd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f100,"fdiv.sxs    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f140,"fdiv.sxx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f4a0,"fdiv.xdd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f480,"fdiv.xds    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f4c0,"fdiv.xdx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f420,"fdiv.xsd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f400,"fdiv.xss    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f440,"fdiv.xsx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f520,"fdiv.xxd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f500,"fdiv.xxs    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f540,"fdiv.xxx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
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-  {0x84002220,"flt.ds      ",{21,5,XREG} ,{0,5,REG}  ,NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84002200,"flt.ss      ",{21,5,XREG} ,{0,5,REG}  ,NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84002240,"flt.xs      ",{21,5,XREG} ,{0,5,REG}  ,NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x840082a0,"fmul.ddd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008280,"fmul.dds    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x840082c0,"fmul.ddx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008220,"fmul.dsd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008200,"fmul.dss    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008240,"fmul.dsx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008320,"fmul.dxd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008300,"fmul.dxs    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008340,"fmul.dxx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x840080a0,"fmul.sdd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008080,"fmul.sds    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x840080c0,"fmul.sdx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008020,"fmul.ssd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008000,"fmul.sss    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008040,"fmul.ssx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008120,"fmul.sxd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008100,"fmul.sxs    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008140,"fmul.sxx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x840084a0,"fmul.xdd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008480,"fmul.xds    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x840084c0,"fmul.xdx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008420,"fmul.xsd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008400,"fmul.xss    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008440,"fmul.xsx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008520,"fmul.xxd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008500,"fmul.xxs    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84008540,"fmul.xxx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x8400f8a0,"fsqrt.dd    ",{21,5,XREG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f880,"fsqrt.ds    ",{21,5,XREG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f8c0,"fsqrt.dx    ",{21,5,XREG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f820,"fsqrt.sd    ",{21,5,XREG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f800,"fsqrt.ss    ",{21,5,XREG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f840,"fsqrt.sx    ",{21,5,XREG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f920,"fsqrt.xd    ",{21,5,XREG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f900,"fsqrt.xs    ",{21,5,XREG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400f940,"fsqrt.xx    ",{21,5,XREG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x8400b2a0,"fsub.ddd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b280,"fsub.dds    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b2c0,"fsub.ddx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b220,"fsub.dsd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b200,"fsub.dss    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b240,"fsub.dsx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b320,"fsub.dxd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b300,"fsub.dxs    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b340,"fsub.dxx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b0a0,"fsub.sdd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b080,"fsub.sds    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b0c0,"fsub.sdx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b020,"fsub.ssd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b000,"fsub.sss    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b040,"fsub.ssx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b120,"fsub.sxd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b100,"fsub.sxs    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b140,"fsub.sxx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b4a0,"fsub.xdd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b480,"fsub.xds    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b4c0,"fsub.xdx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b420,"fsub.xsd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b400,"fsub.xss    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b440,"fsub.xsx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b520,"fsub.xxd    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b500,"fsub.xxs    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400b540,"fsub.xxx    ",{21,5,XREG} ,{16,5,XREG}  ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x8400fc00,"illop", {0,2,DEC}, NO_OPERAND, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
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-  {0x8400c800,"int.ss      ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400c880,"int.sd      ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400c900,"int.sx      ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x04000000,"ld          ", {21,5,XREG}, {16,5,REG}, {0,16,HEX}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x00000000,"ld.d        ", {21,5,XREG}, {16,5,REG}, {0,16,HEX}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x3c000000,"ld.x        ", {21,5,XREG}, {16,5,REG}, {0,16,HEX}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0xf0001400,"ld          ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0001000,"ld.d        ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0001800,"ld.x        ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0001500,"ld.usr      ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0001100,"ld.d.usr    ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0001900,"ld.x.usr    ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0xf0001600,"ld          ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0001200,"ld.d        ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0001a00,"ld.x        ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0001700,"ld.usr      ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0001300,"ld.d.usr    ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0001b00,"ld.x.usr    ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x8400c000,"mov.s       ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400c080,"mov.d       ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84004200,"mov.s       ", {21,5,XREG}, {0,5,REG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x84004280,"mov.d       ", {21,5,XREG}, {0,5,REG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400c300,"mov         ", {21,5,XREG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0xf4006d00,"mulu.d      ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
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-  {0x8400d080,"nint.sd     ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400d000,"nint.ss     ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400d100,"nint.sx     ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x88002020,"padd.b      ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88002040,"padd.h      ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88002060,"padd        ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x880021e0,"padds.s     ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x880021a0,"padds.s.b   ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x880021c0,"padds.s.h   ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x880020e0,"padds.u     ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x880020a0,"padds.u.b   ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x880020c0,"padds.u.h   ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88002160,"padds.us    ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88002120,"padds.us.b  ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88002140,"padds.us.h  ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x88003860,"pcmp        ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x88000000,"pmul        ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x88006260,"ppack.16    ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88006240,"ppack.16.h  ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88006460,"ppack.32    ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88006420,"ppack.32.b  ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88006440,"ppack.32.h  ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88006160,"ppack.8     ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x88007200,"prot        ", {21,5,REG}, {16,5,REG}, {5,6,HEX}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88007800,"prot        ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x88003020,"psub.b      ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88003040,"psub.h      ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88003060,"psub        ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x880031e0,"psubs.s     ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x880031a0,"psubs.s.b   ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x880031c0,"psubs.s.h   ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x880030e0,"psubs.u     ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x880030a0,"psubs.u.b   ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x880030c0,"psubs.u.h   ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88003160,"psubs.us    ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88003120,"psubs.us.b  ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88003140,"psubs.us.h  ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x88006800,"punpk.n     ", {21,5,REG}, {16,5,REG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x88006820,"punpk.b     ", {21,5,REG}, {16,5,REG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x34000000,"st          ", {21,5,XREG}, {16,5,REG}, {0,16,HEX}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x30000000,"st.d        ", {21,5,XREG}, {16,5,REG}, {0,16,HEX}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x38000000,"st.x        ", {21,5,XREG}, {16,5,REG}, {0,16,HEX}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0xf4002c80,"st.b.wt     ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf4002880,"st.h.wt     ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf4002480,"st.wt       ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf4002080,"st.d.wt     ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf4002d80,"st.b.usr.wt ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf4002980,"st.h.usr.wt ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf4002580,"st.usr.wt   ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf4002180,"st.d.usr.wt ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0xf0002400,"st          ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002000,"st.d        ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002100,"st.d.usr    ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002180,"st.d.usr.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002080,"st.d.wt     ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002500,"st.usr      ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002580,"st.usr.wt   ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002480,"st.wt       ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002800,"st.x        ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002900,"st.x.usr    ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002980,"st.x.usr.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002880,"st.x.wt     ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0xf4002f80,"st.b.usr.wt ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf4002e80,"st.b.wt     ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf4002380,"st.d.usr.wt ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf4002280,"st.d.wt     ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf4002b80,"st.h.usr.wt ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf4002a80,"st.h.wt     ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf4002780,"st.usr.wt   ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf4002680,"st.wt       ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0xf0002600,"st          ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002200,"st.d        ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002300,"st.d.usr    ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002380,"st.d.usr.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002280,"st.d.wt     ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002700,"st.usr      ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002780,"st.usr.wt   ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002680,"st.wt       ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002a00,"st.x        ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002b00,"st.x.usr    ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002b80,"st.x.usr.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0xf0002a80,"st.x.wt     ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-  {0x8400d880,"trnc.sd     ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400d800,"trnc.ss     ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-  {0x8400d900,"trnc.sx     ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} },
-
-};
-
-HASHTAB  *hashtable[HASHVAL] = {0};
-\f
-
-/* Initialize the disassembler instruction table.
-
-   Initialize the hash table and instruction table for the
-   disassembler.  This should be called once before the first call to
-   disasm().  */
-
-static void
-init_disasm (void)
-{
-  unsigned int hashvalue, hashsize;
-  struct HASHTAB *hashentries;
-  unsigned int i;
-
-  hashsize = sizeof (instructions) / sizeof (INSTAB);
-
-  hashentries = xmalloc (hashsize * sizeof (struct HASHTAB));
-
-  for (i = 0; i < HASHVAL; i++)
-    hashtable[i] = NULL;
-
-  for (i = 0; i < hashsize; i++)
-    {
-      hashvalue = (instructions[i].opcode) % HASHVAL;
-      hashentries[i].instr = &instructions[i];
-      hashentries[i].next = hashtable[hashvalue];
-      hashtable[hashvalue] = &hashentries[i];
-    }
-}
-
-/* Decode an Operand of an instruction.
-
-   This function formats and writes an operand of an instruction to
-   info based on the operand specification.  When the `first' flag is
-   set this is the first operand of an instruction.  Undefined operand
-   types cause a <dis error> message.
-
-   Parameters:
-    disassemble_info   where the operand may be printed
-    OPSPEC  *opptr      pointer to an operand specification
-    UINT    inst        instruction from which operand is extracted
-    UINT    pc         pc of instruction; used for pc-relative disp.
-    int     first       flag which if nonzero indicates the first
-                        operand of an instruction
-
-   The operand specified is extracted from the instruction and is
-   written to buf in the format specified. The operand is preceded by
-   a comma if it is not the first operand of an instruction and it is
-   not a register indirect form.  Registers are preceded by 'r' and
-   hex values by '0x'.  */
-
-static void
-printop (struct disassemble_info *info,
-        const OPSPEC *opptr,
-        unsigned long inst,
-        bfd_vma pc,
-        int first)
-{
-  int extracted_field;
-  char *cond_mask_sym;
-
-  if (opptr->width == 0)
-    return;
-
-  if (! first)
-    {
-      switch (opptr->type)
-       {
-       case REGSC:
-       case CONT:
-         break;
-       default:
-         (*info->fprintf_func) (info->stream, ",");
-         break;
-       }
-    }
-
-  switch (opptr->type)
-    {
-    case CRREG:
-      (*info->fprintf_func) (info->stream, "cr%d",
-                            UEXT (inst, opptr->offset, opptr->width));
-      break;
-
-    case FCRREG:
-      (*info->fprintf_func) (info->stream, "fcr%d",
-                            UEXT (inst, opptr->offset, opptr->width));
-      break;
-
-    case REGSC:
-      (*info->fprintf_func) (info->stream, "[r%d]",
-                            UEXT (inst, opptr->offset, opptr->width));
-      break;
-
-    case REG:
-      (*info->fprintf_func) (info->stream, "r%d",
-                            UEXT (inst, opptr->offset, opptr->width));
-      break;
-
-    case XREG:
-      (*info->fprintf_func) (info->stream, "x%d",
-                            UEXT (inst, opptr->offset, opptr->width));
-      break;
-
-    case HEX:
-      extracted_field = UEXT (inst, opptr->offset, opptr->width);
-      if (extracted_field == 0)
-       (*info->fprintf_func) (info->stream, "0");
-      else
-       (*info->fprintf_func) (info->stream, "0x%02x", extracted_field);
-      break;
-
-    case DEC:
-      extracted_field = UEXT (inst, opptr->offset, opptr->width);
-      (*info->fprintf_func) (info->stream, "%d", extracted_field);
-      break;
-
-    case CONDMASK:
-      extracted_field = UEXT (inst, opptr->offset, opptr->width);
-      switch (extracted_field & 0x0f)
-       {
-       case 0x1: cond_mask_sym = "gt0"; break;
-       case 0x2: cond_mask_sym = "eq0"; break;
-       case 0x3: cond_mask_sym = "ge0"; break;
-       case 0xc: cond_mask_sym = "lt0"; break;
-       case 0xd: cond_mask_sym = "ne0"; break;
-       case 0xe: cond_mask_sym = "le0"; break;
-       default: cond_mask_sym = NULL; break;
-       }
-      if (cond_mask_sym != NULL)
-       (*info->fprintf_func) (info->stream, "%s", cond_mask_sym);
-      else
-       (*info->fprintf_func) (info->stream, "%x", extracted_field);
-      break;
-
-    case PCREL:
-      (*info->print_address_func)
-       (pc + (4 * (SEXT (inst, opptr->offset, opptr->width))),
-        info);
-      break;
-
-    case CONT:
-      (*info->fprintf_func) (info->stream, "%d,r%d",
-                            UEXT (inst, opptr->offset, 5),
-                            UEXT (inst, (opptr->offset) + 5, 5));
-      break;
-
-    case BF:
-      (*info->fprintf_func) (info->stream, "%d<%d>",
-                            UEXT (inst, (opptr->offset) + 5, 5),
-                            UEXT (inst, opptr->offset, 5));
-      break;
-
-    default:
-      /* xgettext:c-format */
-      (*info->fprintf_func) (info->stream, _("# <dis error: %08lx>"), inst);
-    }
-}
-
-/* Disassemble the instruction in `instruction'.
-   `pc' should be the address of this instruction, it will be used to
-   print the target address if this is a relative jump or call the
-   disassembled instruction is written to `info'.
-
-   The function returns the length of this instruction in bytes.  */
-
-static int
-m88kdis (bfd_vma pc,
-        unsigned long instruction,
-        struct disassemble_info *info)
-{
-  static int ihashtab_initialized = 0;
-  unsigned int opcode;
-  const HASHTAB *entry_ptr;
-  int opmask;
-  unsigned int in_class;
-
-  if (! ihashtab_initialized)
-    {
-      init_disasm ();
-      ihashtab_initialized = 1;
-    }
-
-  /* Create the appropriate mask to isolate the opcode.  */
-  opmask = DEFMASK;
-  in_class = instruction & DEFMASK;
-  if ((in_class >= SFU0) && (in_class <= SFU7))
-    {
-      if (instruction < SFU1)
-       opmask = CTRLMASK;
-      else
-       opmask = SFUMASK;
-    }
-  else if (in_class == RRR)
-    opmask = RRRMASK;
-  else if (in_class == RRI10)
-    opmask = RRI10MASK;
-
-  /* Isolate the opcode.  */
-  opcode = instruction & opmask;
-
-  /* Search the hash table with the isolated opcode.  */
-  for (entry_ptr = hashtable[opcode % HASHVAL];
-       (entry_ptr != NULL) && (entry_ptr->instr->opcode != opcode);
-       entry_ptr = entry_ptr->next)
-    ;
-
-  if (entry_ptr == NULL)
-    (*info->fprintf_func) (info->stream, "word\t%08lx", instruction);
-  else
-    {
-      (*info->fprintf_func) (info->stream, "%s", entry_ptr->instr->mnemonic);
-      printop (info, &(entry_ptr->instr->op1), instruction, pc, 1);
-      printop (info, &(entry_ptr->instr->op2), instruction, pc, 0);
-      printop (info, &(entry_ptr->instr->op3), instruction, pc, 0);
-    }
-
-  return 4;
-}
-\f
-/* Disassemble an M88000 instruction at `memaddr'.  */
-
-int
-print_insn_m88k (bfd_vma memaddr, struct disassemble_info *info)
-{
-  bfd_byte buffer[4];
-  int status;
-
-  /* Instruction addresses may have low two bits set. Clear them.  */
-  memaddr &=~ (bfd_vma) 3;
-
-  status = (*info->read_memory_func) (memaddr, buffer, 4, info);
-  if (status != 0)
-    {
-      (*info->memory_error_func) (status, memaddr, info);
-      return -1;
-    }
-
-  return m88kdis (memaddr, bfd_getb32 (buffer), info);
-}
diff --git a/opcodes/po/POTFILES.in b/opcodes/po/POTFILES.in

index 33f3f6999c3df994cd8e6f4208b36a87dc78e22c..7736bb7fff6ea5bca231f5264b1d2d1600c92d06 100644 (file)
--- a/opcodes/po/POTFILES.in
+++ b/opcodes/po/POTFILES.in
@@ -123,7 +123,6 @@ m68hc11-dis.c
  m68hc11-opc.c
  m68k-dis.c
  m68k-opc.c
-m88k-dis.c
  mcore-dis.c
  mcore-opc.h
  mep-asm.c
author	Alan Modra <amodra@gmail.com>
	Mon, 16 Apr 2018 05:53:38 +0000 (15:23 +0930)
committer	Alan Modra <amodra@gmail.com>
	Mon, 16 Apr 2018 05:53:38 +0000 (15:23 +0930)
bfd/ChangeLog		patch \| blob \| history
bfd/Makefile.am		patch \| blob \| history
bfd/Makefile.in		patch \| blob \| history
bfd/aoutx.h		patch \| blob \| history
bfd/archures.c		patch \| blob \| history
bfd/bfd-in2.h		patch \| blob \| history
bfd/coff-m88k.c	[deleted file]	patch \| blob \| history
bfd/coffcode.h		patch \| blob \| history
bfd/coffswap.h		patch \| blob \| history
bfd/config.bfd		patch \| blob \| history
bfd/configure		patch \| blob \| history
bfd/configure.ac		patch \| blob \| history
bfd/cpu-m88k.c	[deleted file]	patch \| blob \| history
bfd/cpu-ns32k.c		patch \| blob \| history
bfd/elf32-m88k.c	[deleted file]	patch \| blob \| history
bfd/elf32-nds32.c		patch \| blob \| history
bfd/hosts/m88kmach3.h	[deleted file]	patch \| blob \| history
bfd/m88kmach3.c	[deleted file]	patch \| blob \| history
bfd/m88kopenbsd.c	[deleted file]	patch \| blob \| history
bfd/mach-o.c		patch \| blob \| history
bfd/netbsd-core.c		patch \| blob \| history
bfd/po/SRC-POTFILES.in		patch \| blob \| history
bfd/reloc.c		patch \| blob \| history
bfd/targets.c		patch \| blob \| history
binutils/ChangeLog		patch \| blob \| history
binutils/MAINTAINERS		patch \| blob \| history
binutils/testsuite/binutils-all/objdump.exp		patch \| blob \| history
gas/ChangeLog		patch \| blob \| history
gas/config.in		patch \| blob \| history
gas/configure		patch \| blob \| history
gas/configure.ac		patch \| blob \| history
include/ChangeLog		patch \| blob \| history
include/coff/internal.h		patch \| blob \| history
include/coff/m88k.h	[deleted file]	patch \| blob \| history
include/opcode/m88k.h	[deleted file]	patch \| blob \| history
ld/ChangeLog		patch \| blob \| history
ld/Makefile.am		patch \| blob \| history
ld/Makefile.in		patch \| blob \| history
ld/configure.host		patch \| blob \| history
ld/configure.tgt		patch \| blob \| history
ld/emulparams/m88kbcs.sh	[deleted file]	patch \| blob \| history
ld/po/BLD-POTFILES.in		patch \| blob \| history
ld/scripttempl/m88kbcs.sc	[deleted file]	patch \| blob \| history
ld/testsuite/ld-elf/sec-to-seg.exp		patch \| blob \| history
opcodes/ChangeLog		patch \| blob \| history
opcodes/Makefile.am		patch \| blob \| history
opcodes/Makefile.in		patch \| blob \| history
opcodes/configure		patch \| blob \| history
opcodes/configure.ac		patch \| blob \| history
opcodes/disassemble.c		patch \| blob \| history
opcodes/disassemble.h		patch \| blob \| history
opcodes/m88k-dis.c	[deleted file]	patch \| blob \| history
opcodes/po/POTFILES.in		patch \| blob \| history