+2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * reloc.c: New reloc BFD_RELOC_BPF_DISPCALL32.
+ * elf64-bpf.c (bpf_reloc_type_lookup): Handle the new reloc.
+ * libbfd.h (bfd_reloc_code_real_names): Regenerate.
+
2023-07-09 Fangrui Song <maskray@google.com>
PR 30592
/* Linux eBPF relocations. */
BFD_RELOC_BPF_64,
BFD_RELOC_BPF_DISP32,
+ BFD_RELOC_BPF_DISPCALL32,
BFD_RELOC_BPF_DISP16,
/* Adapteva EPIPHANY - 8 bit signed pc-relative displacement */
case BFD_RELOC_BPF_64:
return &bpf_elf_howto_table[ (int) R_BPF_64_64_IDX];
case BFD_RELOC_BPF_DISP32:
+ case BFD_RELOC_BPF_DISPCALL32:
return &bpf_elf_howto_table[ (int) R_BPF_64_32_IDX];
case BFD_RELOC_BPF_DISP16:
return &bpf_elf_howto_table[ (int) R_BPF_GNU_64_16_IDX];
"BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD",
"BFD_RELOC_BPF_64",
"BFD_RELOC_BPF_DISP32",
+ "BFD_RELOC_BPF_DISPCALL32",
"BFD_RELOC_BPF_DISP16",
"BFD_RELOC_EPIPHANY_SIMM8",
"BFD_RELOC_EPIPHANY_SIMM24",
BFD_RELOC_BPF_64
ENUMX
BFD_RELOC_BPF_DISP32
+ENUMX
+ BFD_RELOC_BPF_DISPCALL32
ENUMX
BFD_RELOC_BPF_DISP16
ENUMDOC
+2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-bpf.c (struct bpf_insn): New field `id'.
+ (md_assemble): Save the ids of successfully parsed instructions
+ and use the new BFD_RELOC_BPF_DISPCALL32 whenever appropriate.
+ (md_apply_fix): Adapt to the new BFD reloc.
+ * testsuite/gas/bpf/jump.s: Test JAL.
+ * testsuite/gas/bpf/jump.d: Likewise.
+ * testsuite/gas/bpf/jump-pseudoc.d: Likewise.
+ * testsuite/gas/bpf/jump-be.d: Likewise.
+ * testsuite/gas/bpf/jump-be-pseudoc.d: Likewise.
+ * doc/c-bpf.texi (BPF Instructions): Document new instruction
+ jal/gotol.
+ Document new operand type disp32.
+
2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com>
* testsuite/gas/bpf/mem.s: Add signed load instructions.
struct bpf_insn
{
+ enum bpf_insn_id id;
int size; /* Instruction size in bytes. */
bpf_insn_word opcode;
uint8_t dst;
minus one. */
*valP = (((long) (*valP)) - 8) / 8;
break;
+ case BFD_RELOC_BPF_DISPCALL32:
case BFD_RELOC_BPF_DISP32:
- /* eBPF supports two kind of CALL instructions: the so called
- pseudo calls ("bpf to bpf") and external calls ("bpf to
- kernel").
-
- Both kind of calls use the same instruction (CALL). However,
- external calls are constructed by passing a constant argument
- to the instruction, whereas pseudo calls result from
- expressions involving symbols. In practice, instructions
- requiring a fixup are interpreted as pseudo-calls. If we are
- executing this code, this is a pseudo call.
-
- The kernel expects for pseudo-calls to be annotated by having
- BPF_PSEUDO_CALL in the SRC field of the instruction. But
- beware the infamous nibble-swapping of eBPF and take
- endianness into account here.
-
- Note that the CALL instruction has only one operand, so
- this code is executed only once per instruction. */
- md_number_to_chars (where + 1, target_big_endian ? 0x01 : 0x10, 1);
-
/* Convert from bytes to number of 64-bit words to the target,
minus one. */
*valP = (((long) (*valP)) - 8) / 8;
+
+ if (fixP->fx_r_type == BFD_RELOC_BPF_DISPCALL32)
+ {
+ /* eBPF supports two kind of CALL instructions: the so
+ called pseudo calls ("bpf to bpf") and external calls
+ ("bpf to kernel").
+
+ Both kind of calls use the same instruction (CALL).
+ However, external calls are constructed by passing a
+ constant argument to the instruction, whereas pseudo
+ calls result from expressions involving symbols. In
+ practice, instructions requiring a fixup are interpreted
+ as pseudo-calls. If we are executing this code, this is
+ a pseudo call.
+
+ The kernel expects for pseudo-calls to be annotated by
+ having BPF_PSEUDO_CALL in the SRC field of the
+ instruction. But beware the infamous nibble-swapping of
+ eBPF and take endianness into account here.
+
+ Note that the CALL instruction has only one operand, so
+ this code is executed only once per instruction. */
+ md_number_to_chars (where + 1, target_big_endian ? 0x01 : 0x10, 1);
+ }
break;
case BFD_RELOC_16_PCREL:
/* Convert from bytes to number of 64-bit words to the target,
md_number_to_chars (where + 2, (uint16_t) *valP, 2);
break;
case BFD_RELOC_BPF_DISP32:
+ case BFD_RELOC_BPF_DISPCALL32:
md_number_to_chars (where + 4, (uint32_t) *valP, 4);
break;
case BFD_RELOC_16_PCREL:
return;
}
+ insn.id = opcode->id;
insn.opcode = opcode->opcode;
#undef PARSE_ERROR
{
reloc_howto_type *reloc_howto;
int size;
+ unsigned int bfd_reloc
+ = (insn.id == BPF_INSN_CALL
+ ? BFD_RELOC_BPF_DISPCALL32
+ : BFD_RELOC_BPF_DISP32);
- reloc_howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_BPF_DISP32);
+ reloc_howto = bfd_reloc_type_lookup (stdoutput, bfd_reloc);
if (!reloc_howto)
abort ();
fix_new_exp (frag_now, this_frag - frag_now->fr_literal,
size, &insn.disp32, reloc_howto->pc_relative,
- BFD_RELOC_BPF_DISP32);
+ bfd_reloc);
break;
}
default:
@item disp16
Signed 16-bit immediate representing a displacement to a target,
measured in number of 64-bit words @emph{minus one}.
+@item disp32
+Signed 32-bit immediate representing a displacement to a target,
+measured in number of 64-bit words @emph{minus one}.
@item imm32
Signed 32-bit immediate.
@item imm64
@itemx goto disp16
Jump-always.
+@item jal disp32
+@itemx gotol disp32
+Jump-always, long range.
+
@item jeq rd, rs, disp16
@itemx jeq rd, imm32, disp16
@itemx if rd == rs goto disp16
98: cd 34 00 00 00 00 00 00 if r3s<r4 goto 0
a0: d5 30 00 01 00 00 00 03 if r3s<=3 goto 1
a8: dd 34 00 00 00 00 00 00 if r3s<=r4 goto 0
+ b0: 06 00 00 00 00 00 00 01 gotol 1
+ b8: 06 00 00 00 00 00 00 00 gotol 0
98: cd 34 00 00 00 00 00 00 jslt %r3,%r4,0
a0: d5 30 00 01 00 00 00 03 jsle %r3,3,1
a8: dd 34 00 00 00 00 00 00 jsle %r3,%r4,0
+ b0: 06 00 00 00 00 00 00 01 jal 1
+ b8: 06 00 00 00 00 00 00 00 jal 0
98: cd 43 00 00 00 00 00 00 if r3s<r4 goto 0
a0: d5 03 01 00 03 00 00 00 if r3s<=3 goto 1
a8: dd 43 00 00 00 00 00 00 if r3s<=r4 goto 0
+ b0: 06 00 00 00 01 00 00 00 gotol 1
+ b8: 06 00 00 00 00 00 00 00 gotol 0
\ No newline at end of file
if r3 s< r4 goto 1f
1: if r3 s<= 3 goto 1f
if r3 s<= r4 goto 1f
+1: gotol 1f
+ gotol 1f
1:
98: cd 43 00 00 00 00 00 00 jslt %r3,%r4,0
a0: d5 03 01 00 03 00 00 00 jsle %r3,3,1
a8: dd 43 00 00 00 00 00 00 jsle %r3,%r4,0
+ b0: 06 00 00 00 01 00 00 00 jal 1
+ b8: 06 00 00 00 00 00 00 00 jal 0
\ No newline at end of file
jslt %r3,%r4,1f
1: jsle %r3,3,1f
jsle %r3,%r4,1f
-1:
+1: jal 1f
+ jal 1f
+1:
+2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * opcode/bpf.h (enum bpf_insn_id): Add entry BPF_INSN_JAL.
+ (enum bpf_insn_id): Remove spurious entry BPF_INSN_CALLI.
+
2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com>
* opcode/bpf.h (enum bpf_insn_id): Add entries for signed load
BPF_INSN_JEQI, BPF_INSN_JGTI, BPF_INSN_JSGTI,
BPF_INSN_JGEI, BPF_INSN_JSGEI, BPF_INSN_JLTI, BPF_INSN_JSLTI,
BPF_INSN_JSLEI, BPF_INSN_JLEI, BPF_INSN_JSETI, BPF_INSN_JNEI,
- BPF_INSN_CALLI,
+ /* jump-always with 32-bit offset. */
+ BPF_INSN_JAL,
/* 32-bit compare-and-jump instructions (reg OP reg.) */
BPF_INSN_JEQ32R, BPF_INSN_JGT32R, BPF_INSN_JSGT32R,
BPF_INSN_JGE32R, BPF_INSN_JSGE32R, BPF_INSN_JLT32R, BPF_INSN_JSLT32R,
+2023-07-23 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * bpf-opc.c (bpf_opcodes): Add entry for jal.
+
2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com>
* bpf-opc.c (bpf_opcodes): Add entries for LDXS{B,W,H,DW}
{BPF_INSN_JNEI, "jne%W%dr , %i32 , %d16", "if%w%dr != %i32%wgoto%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JNE|BPF_SRC_K},
+ /* 32-bit jump-always. */
+ {BPF_INSN_JAL, "jal%W%d32", "gotol%w%d32",
+ BPF_V4, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JA|BPF_SRC_K},
+
/* 32-bit compare-and-jump instructions (reg OP reg). */
{BPF_INSN_JEQ32R, "jeq32%W%dr , %sr , %d16", "if%w%dw == %sw%wgoto%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JEQ|BPF_SRC_X},
projects / binutils-gdb.git / commitdiff