/* Bindless texture handles */
if (rbuffer->texture_handle_allocated) {
+ struct si_descriptors *descs = &sctx->bindless_descriptors;
+
util_dynarray_foreach(&sctx->resident_tex_handles,
struct si_texture_handle *, tex_handle) {
struct pipe_sampler_view *view = (*tex_handle)->view;
- struct si_bindless_descriptor *desc = (*tex_handle)->desc;
+ unsigned desc_slot = (*tex_handle)->desc_slot;
if (view->texture == buf) {
si_set_buf_desc_address(rbuffer,
view->u.buf.offset,
- &desc->desc_list[4]);
- desc->dirty = true;
+ descs->list +
+ desc_slot * 16 + 4);
+
+ (*tex_handle)->desc_dirty = true;
sctx->bindless_descriptors_dirty = true;
radeon_add_to_buffer_list_check_mem(
/* Bindless image handles */
if (rbuffer->image_handle_allocated) {
+ struct si_descriptors *descs = &sctx->bindless_descriptors;
+
util_dynarray_foreach(&sctx->resident_img_handles,
struct si_image_handle *, img_handle) {
struct pipe_image_view *view = &(*img_handle)->view;
- struct si_bindless_descriptor *desc = (*img_handle)->desc;
+ unsigned desc_slot = (*img_handle)->desc_slot;
if (view->resource == buf) {
if (view->access & PIPE_IMAGE_ACCESS_WRITE)
si_set_buf_desc_address(rbuffer,
view->u.buf.offset,
- &desc->desc_list[4]);
- desc->dirty = true;
+ descs->list +
+ desc_slot * 16 + 4);
+
+ (*img_handle)->desc_dirty = true;
sctx->bindless_descriptors_dirty = true;
radeon_add_to_buffer_list_check_mem(
}
static void si_upload_bindless_descriptor(struct si_context *sctx,
- struct si_bindless_descriptor *desc)
+ unsigned desc_slot,
+ unsigned num_dwords)
{
+ struct si_descriptors *desc = &sctx->bindless_descriptors;
struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
- uint64_t va = desc->buffer->gpu_address + desc->offset;
- unsigned num_dwords = sizeof(desc->desc_list) / 4;
+ unsigned desc_slot_offset = desc_slot * 16;
+ uint32_t *data;
+ uint64_t va;
+
+ data = desc->list + desc_slot_offset;
+
+ va = desc->buffer->gpu_address + desc->buffer_offset +
+ desc_slot_offset * 4;
radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 2 + num_dwords, 0));
radeon_emit(cs, S_370_DST_SEL(V_370_TC_L2) |
S_370_ENGINE_SEL(V_370_ME));
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
- radeon_emit_array(cs, desc->desc_list, num_dwords);
+ radeon_emit_array(cs, data, num_dwords);
}
static void si_upload_bindless_descriptors(struct si_context *sctx)
util_dynarray_foreach(&sctx->resident_tex_handles,
struct si_texture_handle *, tex_handle) {
- struct si_bindless_descriptor *desc = (*tex_handle)->desc;
+ unsigned desc_slot = (*tex_handle)->desc_slot;
- if (!desc->dirty)
+ if (!(*tex_handle)->desc_dirty)
continue;
- si_upload_bindless_descriptor(sctx, desc);
- desc->dirty = false;
+ si_upload_bindless_descriptor(sctx, desc_slot, 16);
+ (*tex_handle)->desc_dirty = false;
}
util_dynarray_foreach(&sctx->resident_img_handles,
struct si_image_handle *, img_handle) {
- struct si_bindless_descriptor *desc = (*img_handle)->desc;
+ unsigned desc_slot = (*img_handle)->desc_slot;
- if (!desc->dirty)
+ if (!(*img_handle)->desc_dirty)
continue;
- si_upload_bindless_descriptor(sctx, desc);
- desc->dirty = false;
+ si_upload_bindless_descriptor(sctx, desc_slot, 8);
+ (*img_handle)->desc_dirty = false;
}
/* Invalidate L1 because it doesn't know that L2 changed. */
struct si_texture_handle *tex_handle)
{
struct si_sampler_view *sview = (struct si_sampler_view *)tex_handle->view;
- struct si_bindless_descriptor *desc = tex_handle->desc;
+ struct si_descriptors *desc = &sctx->bindless_descriptors;
+ unsigned desc_slot_offset = tex_handle->desc_slot * 16;
uint32_t desc_list[16];
if (sview->base.texture->target == PIPE_BUFFER)
return;
- memcpy(desc_list, desc->desc_list, sizeof(desc_list));
+ memcpy(desc_list, desc->list + desc_slot_offset, sizeof(desc_list));
si_set_sampler_view_desc(sctx, sview, &tex_handle->sstate,
- &desc->desc_list[0]);
+ desc->list + desc_slot_offset);
- if (memcmp(desc_list, desc->desc_list, sizeof(desc_list))) {
- desc->dirty = true;
+ if (memcmp(desc_list, desc->list + desc_slot_offset,
+ sizeof(desc_list))) {
+ tex_handle->desc_dirty = true;
sctx->bindless_descriptors_dirty = true;
}
}
static void si_update_resident_image_descriptor(struct si_context *sctx,
struct si_image_handle *img_handle)
{
- struct si_bindless_descriptor *desc = img_handle->desc;
+ struct si_descriptors *desc = &sctx->bindless_descriptors;
+ unsigned desc_slot_offset = img_handle->desc_slot * 16;
struct pipe_image_view *view = &img_handle->view;
- uint32_t desc_list[16];
+ uint32_t desc_list[8];
if (view->resource->target == PIPE_BUFFER)
return;
- memcpy(desc_list, desc->desc_list, sizeof(desc_list));
- si_set_shader_image_desc(sctx, view, true, &desc->desc_list[0]);
+ memcpy(desc_list, desc->list + desc_slot_offset,
+ sizeof(desc_list));
+ si_set_shader_image_desc(sctx, view, true,
+ desc->list + desc_slot_offset);
- if (memcmp(desc_list, desc->desc_list, sizeof(desc_list))) {
- desc->dirty = true;
+ if (memcmp(desc_list, desc->list + desc_slot_offset,
+ sizeof(desc_list))) {
+ img_handle->desc_dirty = true;
sctx->bindless_descriptors_dirty = true;
}
}
sctx->shader_pointers_dirty = u_bit_consecutive(0, SI_NUM_DESCS);
sctx->vertex_buffer_pointer_dirty = sctx->vertex_buffers.buffer != NULL;
si_mark_atom_dirty(sctx, &sctx->shader_pointers.atom);
+ sctx->graphics_bindless_pointer_dirty = sctx->bindless_descriptors.buffer != NULL;
+ sctx->compute_bindless_pointer_dirty = sctx->bindless_descriptors.buffer != NULL;
}
/* Set a base register address for user data constants in the given shader.
R_00B130_SPI_SHADER_USER_DATA_VS_0);
if (sctx->b.chip_class >= GFX9) {
- /* GFX9 merged LS-HS and ES-GS.
- * Set RW_BUFFERS in the special registers, so that
- * it's preloaded into s[0:1] instead of s[8:9].
- */
- si_emit_shader_pointer(sctx, descs,
- R_00B208_SPI_SHADER_USER_DATA_ADDR_LO_GS);
- si_emit_shader_pointer(sctx, descs,
- R_00B408_SPI_SHADER_USER_DATA_ADDR_LO_HS);
+ /* GFX9 merged LS-HS and ES-GS. */
+ if (descs == &sctx->descriptors[SI_DESCS_RW_BUFFERS]) {
+ /* Set RW_BUFFERS in the special registers, so that
+ * it's preloaded into s[0:1] instead of s[8:9].
+ */
+ si_emit_shader_pointer(sctx, descs,
+ R_00B208_SPI_SHADER_USER_DATA_ADDR_LO_GS);
+ si_emit_shader_pointer(sctx, descs,
+ R_00B408_SPI_SHADER_USER_DATA_ADDR_LO_HS);
+ } else {
+ /* Set BINDLESS_SAMPLERS_AND_IMAGES into s[10:11],
+ * s[8:9] remains unused for now.
+ */
+ assert(descs == &sctx->bindless_descriptors);
+ si_emit_shader_pointer(sctx, descs,
+ R_00B330_SPI_SHADER_USER_DATA_ES_0);
+ si_emit_shader_pointer(sctx, descs,
+ R_00B430_SPI_SHADER_USER_DATA_LS_0);
+ }
} else {
si_emit_shader_pointer(sctx, descs,
R_00B230_SPI_SHADER_USER_DATA_GS_0);
sh_base[PIPE_SHADER_VERTEX]);
sctx->vertex_buffer_pointer_dirty = false;
}
+
+ if (sctx->graphics_bindless_pointer_dirty) {
+ si_emit_global_shader_pointers(sctx,
+ &sctx->bindless_descriptors);
+ sctx->graphics_bindless_pointer_dirty = false;
+ }
}
void si_emit_compute_shader_pointers(struct si_context *sctx)
si_emit_shader_pointer(sctx, descs + i, base);
}
sctx->shader_pointers_dirty &= ~compute_mask;
+
+ if (sctx->compute_bindless_pointer_dirty) {
+ si_emit_shader_pointer(sctx, &sctx->bindless_descriptors, base);
+ sctx->compute_bindless_pointer_dirty = false;
+ }
}
/* BINDLESS */
-struct si_bindless_descriptor_slab
+static void si_init_bindless_descriptors(struct si_context *sctx,
+ struct si_descriptors *desc,
+ unsigned shader_userdata_index,
+ unsigned num_elements)
{
- struct pb_slab base;
- struct r600_resource *buffer;
- struct si_bindless_descriptor *entries;
-};
+ si_init_descriptors(sctx, desc, shader_userdata_index, 16, num_elements,
+ 0, 0, NULL);
+ sctx->bindless_descriptors.num_active_slots = num_elements;
-bool si_bindless_descriptor_can_reclaim_slab(void *priv,
- struct pb_slab_entry *entry)
-{
- /* Do not allow to reclaim any bindless descriptors for now because the
- * GPU might be using them. This should be improved later on.
+ /* The first bindless descriptor is stored at slot 1, because 0 is not
+ * considered to be a valid handle.
*/
- return false;
+ sctx->num_bindless_descriptors = 1;
}
-struct pb_slab *si_bindless_descriptor_slab_alloc(void *priv, unsigned heap,
- unsigned entry_size,
- unsigned group_index)
+static void si_release_bindless_descriptors(struct si_context *sctx)
{
- struct si_context *sctx = priv;
- struct si_screen *sscreen = sctx->screen;
- struct si_bindless_descriptor_slab *slab;
-
- slab = CALLOC_STRUCT(si_bindless_descriptor_slab);
- if (!slab)
- return NULL;
-
- /* Create a buffer in VRAM for 1024 bindless descriptors. */
- slab->buffer = (struct r600_resource *)
- pipe_buffer_create(&sscreen->b.b, 0,
- PIPE_USAGE_DEFAULT, 64 * 1024);
- if (!slab->buffer)
- goto fail;
-
- slab->base.num_entries = slab->buffer->bo_size / entry_size;
- slab->base.num_free = slab->base.num_entries;
- slab->entries = CALLOC(slab->base.num_entries, sizeof(*slab->entries));
- if (!slab->entries)
- goto fail_buffer;
-
- LIST_INITHEAD(&slab->base.free);
-
- for (unsigned i = 0; i < slab->base.num_entries; ++i) {
- struct si_bindless_descriptor *desc = &slab->entries[i];
-
- desc->entry.slab = &slab->base;
- desc->entry.group_index = group_index;
- desc->buffer = slab->buffer;
- desc->offset = i * entry_size;
-
- LIST_ADDTAIL(&desc->entry.head, &slab->base.free);
- }
-
- /* Add the descriptor to the per-context list. */
- util_dynarray_append(&sctx->bindless_descriptors,
- struct r600_resource *, slab->buffer);
-
- return &slab->base;
-
-fail_buffer:
- r600_resource_reference(&slab->buffer, NULL);
-fail:
- FREE(slab);
- return NULL;
+ si_release_descriptors(&sctx->bindless_descriptors);
}
-void si_bindless_descriptor_slab_free(void *priv, struct pb_slab *pslab)
+static unsigned
+si_create_bindless_descriptor(struct si_context *sctx, uint32_t *desc_list,
+ unsigned size)
{
- struct si_context *sctx = priv;
- struct si_bindless_descriptor_slab *slab =
- (struct si_bindless_descriptor_slab *)pslab;
+ struct si_descriptors *desc = &sctx->bindless_descriptors;
+ unsigned desc_slot, desc_slot_offset;
- /* Remove the descriptor from the per-context list. */
- util_dynarray_delete_unordered(&sctx->bindless_descriptors,
- struct r600_resource *, slab->buffer);
+ /* Reserve a new slot for this bindless descriptor. */
+ desc_slot = sctx->num_bindless_descriptors++;
- r600_resource_reference(&slab->buffer, NULL);
- FREE(slab->entries);
- FREE(slab);
-}
+ if (desc_slot >= desc->num_elements) {
+ /* The array of bindless descriptors is full, resize it. */
+ unsigned slot_size = desc->element_dw_size * 4;
+ unsigned new_num_elements = desc->num_elements * 2;
-static struct si_bindless_descriptor *
-si_create_bindless_descriptor(struct si_context *sctx, uint32_t *desc_list,
- unsigned size)
-{
- struct si_screen *sscreen = sctx->screen;
- struct si_bindless_descriptor *desc;
- struct pb_slab_entry *entry;
- void *ptr;
+ desc->list = REALLOC(desc->list, desc->num_elements * slot_size,
+ new_num_elements * slot_size);
+ desc->num_elements = new_num_elements;
+ desc->num_active_slots = new_num_elements;
+ }
- /* Sub-allocate the bindless descriptor from a slab to avoid dealing
- * with a ton of buffers and for reducing the winsys overhead.
+ /* For simplicity, sampler and image bindless descriptors use fixed
+ * 16-dword slots for now. Image descriptors only need 8-dword but this
+ * doesn't really matter because no real apps use image handles.
*/
- entry = pb_slab_alloc(&sctx->bindless_descriptor_slabs, 64, 0);
- if (!entry)
- return NULL;
+ desc_slot_offset = desc_slot * 16;
- desc = NULL;
- desc = container_of(entry, desc, entry);
+ /* Copy the descriptor into the array. */
+ memcpy(desc->list + desc_slot_offset, desc_list, size);
- /* Upload the descriptor directly in VRAM. Because the slabs are
- * currently never reclaimed, we don't need to synchronize the
- * operation.
+ /* Re-upload the whole array of bindless descriptors into a new buffer.
*/
- ptr = sscreen->b.ws->buffer_map(desc->buffer->buf, NULL,
- PIPE_TRANSFER_WRITE |
- PIPE_TRANSFER_UNSYNCHRONIZED);
- util_memcpy_cpu_to_le32(ptr + desc->offset, desc_list, size);
+ if (!si_upload_descriptors(sctx, desc, &sctx->shader_pointers.atom))
+ return 0;
- /* Keep track of the initial descriptor especially for buffers
- * invalidation because we might need to know the previous address.
- */
- memcpy(desc->desc_list, desc_list, sizeof(desc->desc_list));
+ /* Make sure to re-emit the shader pointers for all stages. */
+ sctx->graphics_bindless_pointer_dirty = true;
+ sctx->compute_bindless_pointer_dirty = true;
- return desc;
+ return desc_slot;
}
static void si_invalidate_bindless_buf_desc(struct si_context *sctx,
- struct si_bindless_descriptor *desc,
+ unsigned desc_slot,
struct pipe_resource *resource,
- uint64_t offset)
+ uint64_t offset,
+ bool *desc_dirty)
{
+ struct si_descriptors *desc = &sctx->bindless_descriptors;
struct r600_resource *buf = r600_resource(resource);
- uint32_t *desc_list = desc->desc_list + 4;
+ unsigned desc_slot_offset = desc_slot * 16;
+ uint32_t *desc_list = desc->list + desc_slot_offset + 4;
uint64_t old_desc_va;
assert(resource->target == PIPE_BUFFER);
*/
si_set_buf_desc_address(buf, offset, &desc_list[0]);
- desc->dirty = true;
+ *desc_dirty = true;
sctx->bindless_descriptors_dirty = true;
}
}
memcpy(&tex_handle->sstate, sstate, sizeof(*sstate));
ctx->delete_sampler_state(ctx, sstate);
- tex_handle->desc = si_create_bindless_descriptor(sctx, desc_list,
- sizeof(desc_list));
- if (!tex_handle->desc) {
+ tex_handle->desc_slot = si_create_bindless_descriptor(sctx, desc_list,
+ sizeof(desc_list));
+ if (!tex_handle->desc_slot) {
FREE(tex_handle);
return 0;
}
- handle = tex_handle->desc->buffer->gpu_address +
- tex_handle->desc->offset;
+ handle = tex_handle->desc_slot;
if (!_mesa_hash_table_insert(sctx->tex_handles, (void *)handle,
tex_handle)) {
- pb_slab_free(&sctx->bindless_descriptor_slabs,
- &tex_handle->desc->entry);
FREE(tex_handle);
return 0;
}
pipe_sampler_view_reference(&tex_handle->view, NULL);
_mesa_hash_table_remove(sctx->tex_handles, entry);
- pb_slab_free(&sctx->bindless_descriptor_slabs,
- &tex_handle->desc->entry);
FREE(tex_handle);
}
* while it wasn't resident.
*/
si_update_resident_texture_descriptor(sctx, tex_handle);
- if (tex_handle->desc->dirty)
+ if (tex_handle->desc_dirty)
sctx->bindless_descriptors_dirty = true;
} else {
- si_invalidate_bindless_buf_desc(sctx, tex_handle->desc,
+ si_invalidate_bindless_buf_desc(sctx,
+ tex_handle->desc_slot,
sview->base.texture,
- sview->base.u.buf.offset);
+ sview->base.u.buf.offset,
+ &tex_handle->desc_dirty);
}
/* Add the texture handle to the per-context list. */
/* Add the buffers to the current CS in case si_begin_new_cs()
* is not going to be called.
*/
- radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
- tex_handle->desc->buffer,
- RADEON_USAGE_READWRITE,
- RADEON_PRIO_DESCRIPTORS);
-
si_sampler_view_add_buffer(sctx, sview->base.texture,
RADEON_USAGE_READ,
sview->is_stencil_sampler, false);
{
struct si_context *sctx = (struct si_context *)ctx;
struct si_image_handle *img_handle;
- uint32_t desc_list[16];
+ uint32_t desc_list[8];
uint64_t handle;
if (!view || !view->resource)
si_set_shader_image_desc(sctx, view, false, &desc_list[0]);
- img_handle->desc = si_create_bindless_descriptor(sctx, desc_list,
- sizeof(desc_list));
- if (!img_handle->desc) {
+ img_handle->desc_slot = si_create_bindless_descriptor(sctx, desc_list,
+ sizeof(desc_list));
+ if (!img_handle->desc_slot) {
FREE(img_handle);
return 0;
}
- handle = img_handle->desc->buffer->gpu_address +
- img_handle->desc->offset;
+ handle = img_handle->desc_slot;
if (!_mesa_hash_table_insert(sctx->img_handles, (void *)handle,
img_handle)) {
- pb_slab_free(&sctx->bindless_descriptor_slabs,
- &img_handle->desc->entry);
FREE(img_handle);
return 0;
}
util_copy_image_view(&img_handle->view, NULL);
_mesa_hash_table_remove(sctx->img_handles, entry);
- pb_slab_free(&sctx->bindless_descriptor_slabs,
- &img_handle->desc->entry);
FREE(img_handle);
}
* while it wasn't resident.
*/
si_update_resident_image_descriptor(sctx, img_handle);
- if (img_handle->desc->dirty)
+ if (img_handle->desc_dirty)
sctx->bindless_descriptors_dirty = true;
} else {
- si_invalidate_bindless_buf_desc(sctx, img_handle->desc,
+ si_invalidate_bindless_buf_desc(sctx,
+ img_handle->desc_slot,
view->resource,
- view->u.buf.offset);
+ view->u.buf.offset,
+ &img_handle->desc_dirty);
}
/* Add the image handle to the per-context list. */
/* Add the buffers to the current CS in case si_begin_new_cs()
* is not going to be called.
*/
- radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
- img_handle->desc->buffer,
- RADEON_USAGE_READWRITE,
- RADEON_PRIO_DESCRIPTORS);
-
si_sampler_view_add_buffer(sctx, view->resource,
(access & PIPE_IMAGE_ACCESS_WRITE) ?
RADEON_USAGE_READWRITE :
num_resident_img_handles = sctx->resident_img_handles.size /
sizeof(struct si_image_handle *);
- /* Skip adding the bindless descriptors when no handles are resident.
- */
- if (!num_resident_tex_handles && !num_resident_img_handles)
- return;
-
- /* Add all bindless descriptors. */
- util_dynarray_foreach(&sctx->bindless_descriptors,
- struct r600_resource *, desc) {
-
- radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, *desc,
- RADEON_USAGE_READWRITE,
- RADEON_PRIO_DESCRIPTORS);
- }
-
/* Add all resident texture handles. */
util_dynarray_foreach(&sctx->resident_tex_handles,
struct si_texture_handle *, tex_handle) {
FREE(sctx->vertex_buffers.list); /* not used */
sctx->vertex_buffers.list = NULL;
+ /* Initialize an array of 1024 bindless descriptors, when the limit is
+ * reached, just make it larger and re-upload the whole array.
+ */
+ si_init_bindless_descriptors(sctx, &sctx->bindless_descriptors,
+ SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES,
+ 1024);
+
sctx->descriptors_dirty = u_bit_consecutive(0, SI_NUM_DESCS);
sctx->total_ce_ram_allocated = ce_offset;
sctx->vertex_buffers.list = NULL; /* points into a mapped buffer */
si_release_descriptors(&sctx->vertex_buffers);
+ si_release_bindless_descriptors(sctx);
}
void si_all_descriptors_begin_new_cs(struct si_context *sctx)
for (i = 0; i < SI_NUM_DESCS; ++i)
si_descriptors_begin_new_cs(sctx, &sctx->descriptors[i]);
+ si_descriptors_begin_new_cs(sctx, &sctx->bindless_descriptors);
si_shader_pointers_begin_new_cs(sctx);
}
projects / mesa.git / commitdiff