re PR testsuite/80546 (FAIL: gcc.target/powerpc/bool3-p[78].c scan-assembler-not)
authorPeter Bergner <bergner@gcc.gnu.org>
Sat, 31 Mar 2018 00:52:01 +0000 (19:52 -0500)
committerPeter Bergner <bergner@gcc.gnu.org>
Sat, 31 Mar 2018 00:52:01 +0000 (19:52 -0500)
PR target/80546
* config/rs6000/vsx.md (??r): New mode attribute.
(*vsx_mov<mode>_64bit): Use it.
(*vsx_mov<mode>_32bit): Likewise.

From-SVN: r258987

gcc/ChangeLog
gcc/config/rs6000/vsx.md

index b9f56ad1eab40913037f89729ab09b07f5536de4..c444e12be744ff856c343070296191ab3c1a3146 100644 (file)
@@ -1,3 +1,10 @@
+2018-03-30  Peter Bergner  <bergner@vnet.ibm.com>
+
+       PR target/80546
+       * config/rs6000/vsx.md (??r): New mode attribute.
+       (*vsx_mov<mode>_64bit): Use it.
+       (*vsx_mov<mode>_32bit): Likewise.
+
 2018-03-30  Martin Sebor  <msebor@redhat.com>
 
        PR tree-optimization/84818
 
 2018-03-29  Martin Liska  <mliska@suse.cz>
 
-        PR lto/84995.
-        * doc/invoke.texi: Document how LTO works with debug info.
-        Describe auto-load support of binutils.  Mention 'x86-64'
-        as valid option value of -march option.
+       PR lto/84995.
+       * doc/invoke.texi: Document how LTO works with debug info.
+       Describe auto-load support of binutils.  Mention 'x86-64'
+       as valid option value of -march option.
 
 2018-03-29  Jakub Jelinek  <jakub@redhat.com>
 
index a65ff756a1eff6aae755c446549ec07b3924706a..f7f73cadd67f9ea1c349f26034aa6a4908cff274 100644 (file)
                         (TF    "wp")
                         (KF    "wq")])
 
+;; A mode attribute to disparage use of GPR registers, except for scalar
+;; integer modes.
+(define_mode_attr ??r  [(V16QI "??r")
+                        (V8HI  "??r")
+                        (V4SI  "??r")
+                        (V4SF  "??r")
+                        (V2DI  "??r")
+                        (V2DF  "??r")
+                        (V1TI  "??r")
+                        (KF    "??r")
+                        (TF    "??r")
+                        (TI    "r")])
+
 ;; Same size integer type for floating point data
 (define_mode_attr VSi [(V4SF  "v4si")
                       (V2DF  "v2di")
 (define_insn "*vsx_mov<mode>_64bit"
   [(set (match_operand:VSX_M 0 "nonimmediate_operand"
                "=ZwO,      <VSa>,     <VSa>,     r,         we,        ?wQ,
-                ?&r,       ??r,       ??Y,       ??r,       wo,        v,
+                ?&r,       ??r,       ??Y,       <??r>,     wo,        v,
                 ?<VSa>,    *r,        v,         ??r,       wZ,        v")
 
        (match_operand:VSX_M 1 "input_operand" 
 ;;              LVX (VMX)  STVX (VMX)
 (define_insn "*vsx_mov<mode>_32bit"
   [(set (match_operand:VSX_M 0 "nonimmediate_operand"
-               "=ZwO,      <VSa>,     <VSa>,     ??r,       ??Y,       ??r,
+               "=ZwO,      <VSa>,     <VSa>,     ??r,       ??Y,       <??r>,
                 wo,        v,         ?<VSa>,    *r,        v,         ??r,
                 wZ,        v")