r300: fixup old setTexOffset DRI1 extension

diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index ac1c12873b33f1ba8ccd2008016ec7ea3f0012ab..c3a808ca79f6d37aeaf7a1c9d7f7b8dfb9512ad4 100644 (file)
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -97,7 +97,7 @@ void emit_vpu(GLcontext *ctx, struct radeon_state_atom * atom)
        addr = (cmd.vpu.adrhi << 8) | cmd.vpu.adrlo;
        ndw = cmd.vpu.count * 4;
        if (ndw) {
-               BEGIN_BATCH_NO_AUTOSTATE(13 + ndw);
+               BEGIN_BATCH_NO_AUTOSTATE(15 + ndw);
 
                /* flush processing vertices */
                OUT_BATCH_REGVAL(R300_SC_SCREENDOOR, 0);
@@ -166,35 +166,25 @@ static void emit_tex_offsets(GLcontext *ctx, struct radeon_state_atom * atom)
        if (numtmus) {
                int i;
 
+               BEGIN_BATCH_NO_AUTOSTATE(4 * numtmus);
                for(i = 0; i < numtmus; ++i) {
                    radeonTexObj *t = r300->hw.textures[i];
+                   OUT_BATCH_REGSEQ(R300_TX_OFFSET_0 + (i * 4), 1);
                    if (t && !t->image_override) {
-                           BEGIN_BATCH_NO_AUTOSTATE(4);
-                           OUT_BATCH_REGSEQ(R300_TX_OFFSET_0 + (i * 4), 1);
                            OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, 0,
                                            RADEON_GEM_DOMAIN_VRAM, 0, 0);
-                           END_BATCH();
                    } else if (!t) {
-                           //assert(0);
-                           BEGIN_BATCH_NO_AUTOSTATE(4);
-                           OUT_BATCH_REGSEQ(R300_TX_OFFSET_0 + (i * 4), 1);
                            OUT_BATCH(r300->radeon.radeonScreen->texOffset[0]);
-                           END_BATCH();
-                   } else {
+                   } else { /* override cases */
                            if (t->bo) {
-                                   BEGIN_BATCH_NO_AUTOSTATE(4);
-                                   OUT_BATCH_REGSEQ(R300_TX_OFFSET_0 + (i * 4), 1);
                                    OUT_BATCH_RELOC(t->tile_bits, t->bo, 0,
                                                    RADEON_GEM_DOMAIN_VRAM, 0, 0);
-                                   END_BATCH();
                            } else if (!r300->radeon.radeonScreen->kernel_mm) {
-                                   BEGIN_BATCH_NO_AUTOSTATE(2);
-                                   OUT_BATCH_REGSEQ(R300_TX_OFFSET_0 + (i * 4), 1);
                                    OUT_BATCH(t->override_offset);
-                                   END_BATCH();
                            }
                    }
                }
+               END_BATCH();
        }
 }
 

diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c
index 25cd4d885edafac11ea901e9a1ad696795372fb2..4f145bdbb4e977af586318908e4c1b1f0c477a3c 100644 (file)
--- a/src/mesa/drivers/dri/r300/r300_texstate.c
+++ b/src/mesa/drivers/dri/r300/r300_texstate.c
@@ -216,7 +216,7 @@ static void setup_hardware_state(r300ContextPtr rmesa, radeonTexObj *t)
                return;
        }
 
-       if (t->image_override)
+       if (t->image_override && t->bo)
                return;
 
        t->pp_txsize = (((firstImage->Width - 1) << R300_TX_WIDTHMASK_SHIFT)

diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 086a2683e5ba668b258d8b94be20d36a2ba57b41..f8de799a6dac8bf05d23d4b5a5059eb75521c1fa 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -983,20 +983,22 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
        screen->extensions[i++] = &driMediaStreamCounterExtension.base;
    }
 
+   if (!screen->kernel_mm) {
 #if !RADEON_COMMON
-   screen->extensions[i++] = &radeonTexOffsetExtension.base;
+       screen->extensions[i++] = &radeonTexOffsetExtension.base;
 #endif
 
 #if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
-   if (IS_R200_CLASS(screen))
-       screen->extensions[i++] = &r200AllocateExtension.base;
+        if (IS_R200_CLASS(screen))
+            screen->extensions[i++] = &r200AllocateExtension.base;
 
-   screen->extensions[i++] = &r200texOffsetExtension.base;
+        screen->extensions[i++] = &r200texOffsetExtension.base;
 #endif
 
 #if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
-   //screen->extensions[i++] = &r300texOffsetExtension.base;
+        screen->extensions[i++] = &r300texOffsetExtension.base;
 #endif
+   }
 
    screen->extensions[i++] = NULL;
    sPriv->extensions = screen->extensions;
@@ -1090,7 +1092,7 @@ radeonCreateScreen2(__DRIscreenPrivate *sPriv)
 #endif
 
 #if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
-   screen->extensions[i++] = &r300texOffsetExtension.base;
+   //screen->extensions[i++] = &r300texOffsetExtension.base;
    screen->extensions[i++] = &r300TexBufferExtension.base;
 #endif