* config/m32r/m32r.h (PREFERRED_DEBUGGING_TYPE):
Use DWARF2_DEBUG.
+ * config/m32r.c (m32r_legitimize_pic_address): Changed
+ to support GOTOFF relocation.
+ * config/m32r.md (UNSPEC_GOTOFF): New.
+ (gotoff_load_addr): New.
+
2004-12-15 Richard Sandiford <rsandifo@redhat.com>
* config/mips/mips.c (mips_arg_info): Use FUNCTION_ARG_BOUNDARY to
else
address = reg;
+ current_function_uses_pic_offset_table = 1;
+
+ if (GET_CODE (orig) == LABEL_REF
+ || (GET_CODE (orig) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (orig)))
+ {
+ emit_insn (gen_gotoff_load_addr (reg, orig));
+ emit_insn (gen_addsi3 (reg, reg, pic_offset_table_rtx));
+ return reg;
+ }
+
emit_insn (gen_pic_load_addr (address, orig));
emit_insn (gen_addsi3 (address, address, pic_offset_table_rtx));
pic_ref = gen_const_mem (Pmode, address);
insn = emit_move_insn (reg, pic_ref);
- current_function_uses_pic_offset_table = 1;
#if 0
/* Put a REG_EQUAL note on this insn, so that it can be optimized
by loop. */
[(UNSPEC_LOAD_SDA_BASE 2)
(UNSPEC_SET_CBIT 3)
(UNSPEC_PIC_LOAD_ADDR 4)
- (UNSPEC_GET_PC 5)])
+ (UNSPEC_GET_PC 5)
+ (UNSPEC_GOTOFF 6)
+ ])
;; Insn type. Used to default other attribute values.
(define_attr "type"
"ld24 %0,%#%1"
[(set_attr "type" "int4")])
+(define_insn "gotoff_load_addr"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (unspec:SI [(match_operand 1 "" "")] UNSPEC_GOTOFF))]
+ "flag_pic"
+ "seth %0, %#shigh(%1@GOTOFF)\;add3 %0, %0, low(%1@GOTOFF)"
+ [(set_attr "type" "int4")
+ (set_attr "length" "8")])
+
;; Load program counter insns.
(define_insn "get_pc"