add ls007 stub RFC

bug https://bugs.libre-soc.org/show_bug.cgi?id=1017

diff --git a/openpower/sv/rfc/ls007.mdwn b/openpower/sv/rfc/ls007.mdwn
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+# RFC ls007 Ternary/Binary GPR and CR Field bit-operations
+
+**URLs**:
+
+* <https://libre-soc.org/openpower/sv/bitmanip/>
+* <https://libre-soc.org/openpower/sv/rfc/ls007/>
+* <https://bugs.libre-soc.org/show_bug.cgi?id=1017>
+* <https://git.openpower.foundation/isa/PowerISA/issues/todo>
+
+**Severity**: Major
+
+**Status**: New
+
+**Date**: 20 Oct 2022
+
+**Target**: v3.2B
+
+**Source**: v3.0B
+
+**Books and Section affected**: **UPDATE**
+
+```
+    Book I 64-bit Fixed-Point Arithmetic Instructions 3.3.9.1
+    Appendix E Power ISA sorted by opcode
+    Appendix F Power ISA sorted by version
+    Appendix G Power ISA sorted by Compliancy Subset
+    Appendix H Power ISA sorted by mnemonic
+```
+
+**Summary**
+
+Instructions added
+
+```
+    todo
+```
+
+**Submitter**: Luke Leighton (Libre-SOC)
+
+**Requester**: Libre-SOC
+
+**Impact on processor**:
+
+```
+    Addition of two new GPR-based instructions
+    Addition of two new CR-field-based instructions
+```
+
+**Impact on software**:
+
+```
+    Requires support for new instructions in assembler, debuggers,
+    and related tools.
+```
+
+**Keywords**:
+
+```
+    GPR, CR-Field, bitmanipulation, ternary, binary
+```
+
+**Motivation**
+
+
+**Notes and Observations**:
+
+
+**Changes**
+
+Add the following entries to:
+
+* the Appendices of Book I
+* Instructions of Book I added to Section 3.3.9.1
+* VA2-Form of Book I Section 1.6.21.1 and 1.6.2
+
+----------------
+
+\newpage{}
+
+
+----------
+
+# Appendices
+
+    Appendix E Power ISA sorted by opcode
+    Appendix F Power ISA sorted by version
+    Appendix G Power ISA sorted by Compliancy Subset
+    Appendix H Power ISA sorted by mnemonic
+
+|Form| Book | Page | Version | mnemonic | Description |
+|----|------|------|---------|----------|-------------|
+|VA  | I    | #    | 3.2B    |todo   | |
+
+----------------
+
+[[!tag opf_rfc]]