* [Verilator runtime command documentation](https://verilator.org/guide/latest/exe_sim.html)
* First steps for working with PowerISA instructions Libre-SOC page:
[[/docs/firststeps]]
+* Tutorials for how to work with verilator: [part1](https://www.itsembedded.com/dhd/verilator_1/), [part2](https://www.itsembedded.com/dhd/verilator_2/)
## Development environment scripts
These snapshots are generated at intervals of every 2,000,000 ticks.
-- `microwatt-verilator.vcd` - (TODO: Need to check) - GTKWave waveform file,
-allowing you to look at processor signals and transitions during simulation.
-*Needs to be converted to fst file first*:
+- `microwatt-verilator.vcd` - GTKWave waveform file, allowing you to look at
+processor signals and transitions during simulation.
+Pass `-d` flag to `microwatt-verilator` binary:
+
+ (microwatt):$ ./microwatt-verilator hello_world/hello_world.bin -d
+
+**NOTE**: Trace dumping will generate a large VCD file (about 6GB for the hello
+world example)!
+
+If you want GTKWave to load it faster, convert to fst first:
(microwatt):$ vcd2fst --vcdname=microwatt-verilator.vcd --fstname=microwatt-verilator.fst
(microwatt):$ gtkwave microwatt-verilator.fst