ddrphy_wlevel_en_write(0);
}
+#ifdef KUSDDRPHY
+#define ERR_DDRPHY_DELAY 512
+#else
#define ERR_DDRPHY_DELAY 32
+#endif
static int write_level(int *delay, int *high_skew)
{
for(i=DFII_PIX_DATA_SIZE/2-1;i>=0;i--)
if(delay[i] > bitslip_thr) {
ddrphy_dly_sel_write(1 << i);
+#ifdef KUSDDRPHY
+ ddrphy_rdly_dq_bitslip_write(1);
+#else
/* 7-series SERDES in DDR mode needs 3 pulses for 1 bitslip */
ddrphy_rdly_dq_bitslip_write(1);
ddrphy_rdly_dq_bitslip_write(1);
ddrphy_rdly_dq_bitslip_write(1);
+#endif
printf("%d ", i);
}
printf("\n");
delay_min = delay;
/* Get a bit further into the working zone */
+#ifdef KUSDDRPHY
+ for(j=0;j<8;j++) {
+ delay += 1;
+ ddrphy_rdly_dq_inc_write(1);
+ }
+#else
delay++;
ddrphy_rdly_dq_inc_write(1);
+#endif
/* Find largest working delay */
while(1) {