caller-save.c (init_caller_save): Base temporary register numbers on LAST_VIRTUAL_REG...

gcc/
	* caller-save.c (init_caller_save): Base temporary register numbers
	on LAST_VIRTUAL_REGISTER + 1 rather than FIRST_PSEUDO_REGISTER.
	* cfgloopanal.c (init_set_costs): Likewise.
	* dojump.c (prefer_and_bit_test): Likewise.
	* expr.c (init_expr_target): Likewise.
	* ira.c (setup_prohibited_mode_move_regs): Likewise.
	* lower-subreg.c (init_lower_subreg): Likewise.
	* postreload.c (reload_cse_regs_1): Likewise.

From-SVN: r223688

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c5f8f5e4dde939dfb48f0749aef0e705cb8e99cf..d4107ca584c93e8aef253d19078ed9f143cc92dd 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2015-05-26  Richard Sandiford  <richard.sandiford@arm.com>
+
+       * caller-save.c (init_caller_save): Base temporary register numbers
+       on LAST_VIRTUAL_REGISTER + 1 rather than FIRST_PSEUDO_REGISTER.
+       * cfgloopanal.c (init_set_costs): Likewise.
+       * dojump.c (prefer_and_bit_test): Likewise.
+       * expr.c (init_expr_target): Likewise.
+       * ira.c (setup_prohibited_mode_move_regs): Likewise.
+       * lower-subreg.c (init_lower_subreg): Likewise.
+       * postreload.c (reload_cse_regs_1): Likewise.
+
 2015-05-26  Richard Sandiford  <richard.sandiford@arm.com>
 
        * gensupport.h (compute_test_codes): Declare.

diff --git a/gcc/caller-save.c b/gcc/caller-save.c
index 673a47051da184e80bb9fb9046b93ef10cb764a6..be7be7d739980dd2029cc3e44b4577604003c1dd 100644 (file)
--- a/gcc/caller-save.c
+++ b/gcc/caller-save.c
@@ -286,7 +286,7 @@ init_caller_save (void)
      To avoid lots of unnecessary RTL allocation, we construct all the RTL
      once, then modify the memory and register operands in-place.  */
 
-  test_reg = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
+  test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
   test_mem = gen_rtx_MEM (word_mode, address);
   savepat = gen_rtx_SET (test_mem, test_reg);
   restpat = gen_rtx_SET (test_reg, test_mem);

diff --git a/gcc/cfgloopanal.c b/gcc/cfgloopanal.c
index 8b05b4da0904b0a528a77d2e7d1583e118b15758..35c1e8d6ba26f7a946be07c2e2065a180b61fe88 100644 (file)
--- a/gcc/cfgloopanal.c
+++ b/gcc/cfgloopanal.c
@@ -336,9 +336,9 @@ init_set_costs (void)
 {
   int speed;
   rtx_insn *seq;
-  rtx reg1 = gen_raw_REG (SImode, FIRST_PSEUDO_REGISTER);
-  rtx reg2 = gen_raw_REG (SImode, FIRST_PSEUDO_REGISTER + 1);
-  rtx addr = gen_raw_REG (Pmode, FIRST_PSEUDO_REGISTER + 2);
+  rtx reg1 = gen_raw_REG (SImode, LAST_VIRTUAL_REGISTER + 1);
+  rtx reg2 = gen_raw_REG (SImode, LAST_VIRTUAL_REGISTER + 2);
+  rtx addr = gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 3);
   rtx mem = validize_mem (gen_rtx_MEM (SImode, addr));
   unsigned i;
 

diff --git a/gcc/dojump.c b/gcc/dojump.c
index e5ea58957601e50025fbba1229717ba290bfdf3e..d788fe090561805afd2d0974665e38bcfe417f2a 100644 (file)
--- a/gcc/dojump.c
+++ b/gcc/dojump.c
@@ -198,7 +198,7 @@ prefer_and_bit_test (machine_mode mode, int bitnum)
     {
       /* Set up rtxes for the two variations.  Use NULL as a placeholder
         for the BITNUM-based constants.  */
-      and_reg = gen_rtx_REG (mode, FIRST_PSEUDO_REGISTER);
+      and_reg = gen_rtx_REG (mode, LAST_VIRTUAL_REGISTER + 1);
       and_test = gen_rtx_AND (mode, and_reg, NULL);
       shift_test = gen_rtx_AND (mode, gen_rtx_ASHIFTRT (mode, and_reg, NULL),
                                const1_rtx);

diff --git a/gcc/expr.c b/gcc/expr.c
index dccaf8be51bc50d0ab10ac9228db63df7be6a071..a613bebe824d9eef548052726b66edfa64c27670 100644 (file)
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -199,7 +199,7 @@ init_expr_target (void)
 
   /* A scratch register we can modify in-place below to avoid
      useless RTL allocations.  */
-  reg = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
+  reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
 
   insn = rtx_alloc (INSN);
   pat = gen_rtx_SET (NULL_RTX, NULL_RTX);
@@ -249,7 +249,7 @@ init_expr_target (void)
          }
     }
 
-  mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, FIRST_PSEUDO_REGISTER));
+  mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 1));
 
   for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
        mode = GET_MODE_WIDER_MODE (mode))

diff --git a/gcc/ira.c b/gcc/ira.c
index 47b57252bb6a73cc722b2423fa5cdffd7b9cbcd7..804d162f0f012647e59809a5bd3ee7840c8ff2f3 100644 (file)
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -1767,8 +1767,8 @@ setup_prohibited_mode_move_regs (void)
   if (ira_prohibited_mode_move_regs_initialized_p)
     return;
   ira_prohibited_mode_move_regs_initialized_p = true;
-  test_reg1 = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
-  test_reg2 = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
+  test_reg1 = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
+  test_reg2 = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 2);
   move_pat = gen_rtx_SET (test_reg1, test_reg2);
   move_insn = gen_rtx_INSN (VOIDmode, 0, 0, 0, move_pat, 0, -1, 0);
   for (i = 0; i < NUM_MACHINE_MODES; i++)

diff --git a/gcc/lower-subreg.c b/gcc/lower-subreg.c
index 6d2ba2902c65a978a9ee664c74ee18b6752b0201..095b5696e712ffb4be70305c4c557d27d3001e0c 100644 (file)
--- a/gcc/lower-subreg.c
+++ b/gcc/lower-subreg.c
@@ -295,8 +295,8 @@ init_lower_subreg (void)
 
   twice_word_mode = GET_MODE_2XWIDER_MODE (word_mode);
 
-  rtxes.target = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
-  rtxes.source = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER + 1);
+  rtxes.target = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
+  rtxes.source = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 2);
   rtxes.set = gen_rtx_SET (rtxes.target, rtxes.source);
   rtxes.zext = gen_rtx_ZERO_EXTEND (twice_word_mode, rtxes.source);
   rtxes.shift = gen_rtx_ASHIFT (twice_word_mode, rtxes.source, const0_rtx);

diff --git a/gcc/postreload.c b/gcc/postreload.c
index 525c66133f0a63678e3ccc94f3b5945abaf795d9..4d3c26fc7bf264068ca25d6fbee570b1ef558fb6 100644 (file)
--- a/gcc/postreload.c
+++ b/gcc/postreload.c
@@ -234,7 +234,7 @@ reload_cse_regs_1 (void)
   bool cfg_changed = false;
   basic_block bb;
   rtx_insn *insn;
-  rtx testreg = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
+  rtx testreg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
 
   cselib_init (CSELIB_RECORD_MEMORY);
   init_alias_analysis ();