Make "test" set some condition codes.

It still needs to zero the overflow and carry flags to be correct.

--HG--
extra : convert_revision : 73cb3a55f7b4234389d9355f5ad45da6aaaa6c60

diff --git a/src/arch/x86/isa/insts/compare_and_test/test.py b/src/arch/x86/isa/insts/compare_and_test/test.py
index 89d40691297855b05690a22368bd1ba426a03d62..1d2364f0f8aa04efa6272c598509498e472e4fc8 100644 (file)
--- a/src/arch/x86/isa/insts/compare_and_test/test.py
+++ b/src/arch/x86/isa/insts/compare_and_test/test.py
@@ -57,26 +57,26 @@ microcode = '''
 def macroop TEST_M_R
 {
     ld t1, ds, [scale, index, base], disp
-    and t0, t1, reg
+    and t0, t1, reg, flags=(SF, ZF, PF)
 };
 
 def macroop TEST_P_R
 {
     rdip t7
     ld t1, ds, [scale, index, base], disp
-    and t0, t1, reg
+    and t0, t1, reg, flags=(SF, ZF, PF)
 };
 
 def macroop TEST_R_R
 {
-    and t0, reg, regm
+    and t0, reg, regm, flags=(SF, ZF, PF)
 };
 
 def macroop TEST_M_I
 {
     ld t1, ds, [scale, index, base], disp
     limm t2, imm
-    and t0, t1, t2
+    and t0, t1, t2, flags=(SF, ZF, PF)
 };
 
 def macroop TEST_P_I
@@ -84,12 +84,12 @@ def macroop TEST_P_I
     rdip t7
     ld t1, ds, [scale, index, base], disp
     limm t2, imm
-    and t0, t1, t2
+    and t0, t1, t2, flags=(SF, ZF, PF)
 };
 
 def macroop TEST_R_I
 {
     limm t1, imm
-    and t0, reg, t1
+    and t0, reg, t1, flags=(SF, ZF, PF)
 };
 '''