i965/blorp: Switch the order of render and texture targets

On gen8 color resolving won't work anymore if the target isn't
the first entry in the binding table.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index ef92fdc2459e9de387028d9bfad0ac7ce05d6b15..c284fc8f340e922714f5658170887d7de6f29006 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -56,8 +56,8 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
  * Binding table indices used by BLORP.
  */
 enum {
-   BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX,
    BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX,
+   BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX,
    BRW_BLORP_NUM_BINDING_TABLE_ENTRIES
 };
 

diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
index 7ec0b2a2f5343e2c8399f1551ba66ae52df7b771..b09542158dc7af1bf5b91b113e6404e7e8744f41 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
@@ -43,6 +43,10 @@ brw_blorp_eu_emitter::get_program(struct brw_context *brw, bool debug_flag,
    cfg_t cfg(&insts);
    brw_stage_prog_data prog_data = { 0 };
    brw_wm_prog_key prog_key = { 0 };
+
+   prog_data.binding_table.texture_start =
+      BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX;
+
    fs_generator generator(brw->intelScreen->compiler, brw, mem_ctx, &prog_key,
                           &prog_data, 0, false, MESA_SHADER_FRAGMENT);