sim: fix “alligned” typos

Change-Id: Ifd574e38524dd4f1cf0fc003e0c5c7499abc84a0

diff --git a/sim/common/sim-core.h b/sim/common/sim-core.h
index 5f152ee0552a4f17eea86a96b9d837bcc59fb4b0..df4e3e17a7bcff05070d97759d58f3e119727037 100644 (file)
--- a/sim/common/sim-core.h
+++ b/sim/common/sim-core.h
@@ -248,7 +248,7 @@ extern void *sim_core_trans_addr
    order (including xor endian).  Should the transfer fail, the
    operation shall abort (no return).
 
-   ALIGNED assumes yhat the specified ADDRESS is correctly alligned
+   ALIGNED assumes that the specified ADDRESS is correctly aligned
    for an N byte transfer (no alignment checks are made).  Passing an
    incorrectly aligned ADDRESS is erroneous.
 
@@ -256,7 +256,7 @@ extern void *sim_core_trans_addr
    of an N byte transfer. Action, as defined by WITH_ALIGNMENT, being
    taken should the check fail.
 
-   MISSALIGNED transfers the data regardless.
+   MISALIGNED transfers the data regardless.
 
    Misaligned xor-endian accesses are broken into a sequence of
    transfers each <= WITH_XOR_ENDIAN bytes */

diff --git a/sim/ppc/hw_init.c b/sim/ppc/hw_init.c
index 3d58833bb3d40ac358fe7ac2bdc501b13ad849d5..66f205851d56118af0e8797fe00002e0453529ed 100644 (file)
--- a/sim/ppc/hw_init.c
+++ b/sim/ppc/hw_init.c
@@ -576,7 +576,7 @@ create_ppc_elf_stack_frame(device *me,
   const unsigned sizeof_argv = sizeof_arguments(argv);
   const unsigned_word start_argv = start_envp - sizeof_argv;
 
-  /* link register save address - alligned to a 16byte boundary */
+  /* link register save address - aligned to a 16byte boundary */
   const unsigned_word top_of_stack = ((start_argv
                                       - 2 * sizeof(unsigned_word))
                                      & ~0xf);

diff --git a/sim/ppc/std-config.h b/sim/ppc/std-config.h
index 0619d1dff191f3d444a853dd16e91bbbbca9b153..e02d5946a73492d81bf6c321adc8889e0903c926 100644 (file)
--- a/sim/ppc/std-config.h
+++ b/sim/ppc/std-config.h
@@ -183,7 +183,7 @@ extern int current_environment;
    This model.  Instead allows both little and big endian modes to
    either take exceptions or handle miss aligned transfers.
 
-   If 0 is specified then for big-endian mode miss alligned accesses
+   If 0 is specified then for big-endian mode miss aligned accesses
    are permitted (NONSTRICT_ALIGNMENT) while in little-endian mode the
    processor will fault on them (STRICT_ALIGNMENT). */