i386.c (ix86_legitimate_combined_insn): Reject combined insn if the alignment of...

	* config/i386/i386.c (ix86_legitimate_combined_insn): Reject
	combined insn if the alignment of vector mode memory operand
	is less than ssememalign.

testsuite/ChangeLog:

	* gcc.target/i386/sse-1.c (swizzle): Assume that a is
	aligned to 64 bits.

From-SVN: r230215

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9ab4c6ac458f7de18b4e65bb6d1de1b8d1b1d52f..815bb089575c905c22e779b9b972a802c425c315 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,12 +1,18 @@
+2015-11-12  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.c (ix86_legitimate_combined_insn): Reject
+       combined insn if the alignment of vector mode memory operand
+       is less than ssememalign.
+
 2015-11-12  Tom de Vries  <tom@codesourcery.com>
 
-       * gen-pass-instances.awk (handle_line): Print parentheses and pass_name
-       explicitly.
+       * gen-pass-instances.awk (handle_line): Print parentheses and
+       pass_name explicitly.
 
 2015-11-12  Tom de Vries  <tom@codesourcery.com>
 
-       * gen-pass-instances.awk (handle_line): Add pass_num, prefix and postfix
-       vars.
+       * gen-pass-instances.awk (handle_line): Add pass_num, prefix
+       and postfix vars.
 
 2015-11-12  Tom de Vries  <tom@codesourcery.com>
 
@@ -45,7 +51,7 @@
        Move Convert C1/(X*C2) into (C1/C2)/X to match.pd.
        Move Optimize (X & (-A)) / A where A is a power of 2, to
        X >> log2(A) to match.pd.
-       
+
        * match.pd (rdiv (rdiv:s @0 @1) @2): New simplifier.
        (rdiv @0 (rdiv:s @1 @2)): New simplifier.
        (div (convert? (bit_and @0 INTEGER_CST@1)) INTEGER_CST@2):

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index baa0e031c8354c319b7365969a0ac09d7e10ee7e..d048b19f3855d9fae9eb02b063bc6c3429d60153 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -7236,11 +7236,12 @@ ix86_legitimate_combined_insn (rtx_insn *insn)
          /* For pre-AVX disallow unaligned loads/stores where the
             instructions don't support it.  */
          if (!TARGET_AVX
-             && VECTOR_MODE_P (GET_MODE (op))
-             && misaligned_operand (op, GET_MODE (op)))
+             && VECTOR_MODE_P (mode)
+             && misaligned_operand (op, mode))
            {
-             int min_align = get_attr_ssememalign (insn);
-             if (min_align == 0)
+             unsigned int min_align = get_attr_ssememalign (insn);
+             if (min_align == 0
+                 || MEM_ALIGN (op) < min_align)
                return false;
            }
 

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 57384e2fae6613ce3efae4e677b01effcb53a31c..a7326b56eacbe6cf3bf0a07f13ea6d7b95a3a646 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-11-12  Uros Bizjak  <ubizjak@gmail.com>
+
+       * gcc.target/i386/sse-1.c (swizzle): Assume that a is
+       aligned to 64 bits.
+
 2015-11-11  David Edelsohn  <dje.gcc@gmail.com>
 
        * gcc.dg/pr65521.c: Fail on AIX.

diff --git a/gcc/testsuite/gcc.target/i386/sse-1.c b/gcc/testsuite/gcc.target/i386/sse-1.c
index afae22d3705403f1030661f40075b884625b671e..15d38f9d5dd8bdbddaaee0d1f6da1064591c3526 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/sse-1.c
+++ b/gcc/testsuite/gcc.target/i386/sse-1.c
@@ -14,8 +14,10 @@ typedef union
 void
 swizzle (const void *a, vector4_t * b, vector4_t * c)
 {
-  b->v = _mm_loadl_pi (b->v, (__m64 *) a);
-  c->v = _mm_loadl_pi (c->v, ((__m64 *) a) + 1);
+  __m64 *t = __builtin_assume_aligned (a, 64);
+
+  b->v = _mm_loadl_pi (b->v, t);
+  c->v = _mm_loadl_pi (c->v, t + 1);
 }
 
 /* While one legal rendering of each statement would be movaps;movlps;movaps,