Add a vect_masked_store target selector
authorRichard Sandiford <richard.sandiford@linaro.org>
Thu, 9 Nov 2017 15:19:15 +0000 (15:19 +0000)
committerRichard Sandiford <rsandifo@gcc.gnu.org>
Thu, 9 Nov 2017 15:19:15 +0000 (15:19 +0000)
This patch adds a target selector that says whether the target
supports IFN_MASK_STORE.

2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* doc/sourcebuild.texi (vect_masked_store): Document.

gcc/testsuite/
* lib/target-supports.exp (check_effective_target_vect_masked_store):
New proc.
* gcc.dg/vect/vect-cselim-1.c (foo): Mention that the second loop
is vectorizable with masked stores.  Update scan-tree-dump-times
accordingly.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254597

gcc/ChangeLog
gcc/doc/sourcebuild.texi
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.dg/vect/vect-cselim-1.c
gcc/testsuite/lib/target-supports.exp

index 84e788f735caea4f853c6efa0a3cc51bbadd2dcb..944a3a3bd7ab18abb3390519101454d705950191 100644 (file)
@@ -1,3 +1,9 @@
+2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
+           Alan Hayward  <alan.hayward@arm.com>
+           David Sherwood  <david.sherwood@arm.com>
+
+       * doc/sourcebuild.texi (vect_masked_store): Document.
+
 2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
            Alan Hayward  <alan.hayward@arm.com>
            David Sherwood  <david.sherwood@arm.com>
index d200f7135bea27e83e4db975c781cb650e0fc89f..d5a90e518d67fb289c8caf2e8f2237970b6649ea 100644 (file)
@@ -1403,6 +1403,9 @@ Target supports hardware vectors of @code{long}.
 @item vect_long_long
 Target supports hardware vectors of @code{long long}.
 
+@item vect_masked_store
+Target supports vector masked stores.
+
 @item vect_aligned_arrays
 Target aligns arrays to vector alignment boundary.
 
index 8d7ad64cdca77ff6a309cd13a44d38ec1095fb0e..3ace82cb5f1f60b008f66c5fdeff13fe5c9b4ba6 100644 (file)
@@ -1,3 +1,13 @@
+2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
+           Alan Hayward  <alan.hayward@arm.com>
+           David Sherwood  <david.sherwood@arm.com>
+
+       * lib/target-supports.exp (check_effective_target_vect_masked_store):
+       New proc.
+       * gcc.dg/vect/vect-cselim-1.c (foo): Mention that the second loop
+       is vectorizable with masked stores.  Update scan-tree-dump-times
+       accordingly.
+
 2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
            Alan Hayward  <alan.hayward@arm.com>
            David Sherwood  <david.sherwood@arm.com>
index 2b0101329840bebdc7c0341bcc9f4f9bda2fa098..e6ad865303c42c9d5958cb6e7eac6a766752902b 100644 (file)
@@ -38,7 +38,7 @@ foo ()
         }
     }
 
-  /* Not vectorizable.  */
+  /* Only vectorizable with masked stores.  */
   for (i = 0; i < N; i++)
     {
       c = in1[i].b;
@@ -82,4 +82,5 @@ main (void)
   return 0;
 }
 
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { xfail { { vect_no_align && { ! vect_hw_misalign } } || { ! vect_strided2 } } } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! vect_masked_store } xfail { { vect_no_align && { ! vect_hw_misalign } } || { ! vect_strided2 } } } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target { vect_masked_store } } } } */
index 9ef40198d1bb68edeb032c10389c9ec46479b356..54e203681bab11dacbe2df6f448d3f8b3629c2e8 100644 (file)
@@ -6433,6 +6433,12 @@ proc check_effective_target_vect_load_lanes { } {
     return $et_vect_load_lanes
 }
 
+# Return 1 if the target supports vector masked stores.
+
+proc check_effective_target_vect_masked_store { } {
+    return 0
+}
+
 # Return 1 if the target supports vector conditional operations, 0 otherwise.
 
 proc check_effective_target_vect_condition { } {