r600g: fix num_banks interpretation on eg+

Field is encoded:
0 = 4 banks
1 = 8 banks
2 = 16 banks

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>

diff --git a/src/gallium/winsys/r600/drm/r600_drm.c b/src/gallium/winsys/r600/drm/r600_drm.c
index 03fe385334c54adf208b9111b9f57e7c1fb0a033..4602f7f2a4b15bf0886b1df9c4faaf5db69e8114 100644 (file)
--- a/src/gallium/winsys/r600/drm/r600_drm.c
+++ b/src/gallium/winsys/r600/drm/r600_drm.c
@@ -156,7 +156,20 @@ static int eg_interpret_tiling(struct radeon *radeon, uint32_t tiling_config)
                return -EINVAL;
        }
 
-       radeon->tiling_info.num_banks = (tiling_config & 0xf0) >> 4;
+       switch ((tiling_config & 0xf0) >> 4) {
+       case 0:
+               radeon->tiling_info.num_banks = 4;
+               break;
+       case 1:
+               radeon->tiling_info.num_banks = 8;
+               break;
+       case 2:
+               radeon->tiling_info.num_banks = 16;
+               break;
+       default:
+               return -EINVAL;
+
+       }
 
        switch ((tiling_config & 0xf00) >> 8) {
        case 0: