Another oops

diff --git a/passes/pmgen/xilinx_dsp.cc b/passes/pmgen/xilinx_dsp.cc
index b03fff8ecb28ddfde909be7940ba24a28e5529b1..66fe7736b99bd0f1d405c91242a8c1d63727af0e 100644 (file)
--- a/passes/pmgen/xilinx_dsp.cc
+++ b/passes/pmgen/xilinx_dsp.cc
@@ -101,7 +101,7 @@ void pack_xilinx_dsp(dict<SigBit, Cell*> &bit_to_driver, xilinx_dsp_pm &pm)
                        SigSpec Q = st.ffM->getPort("\\Q");
                        P.replace(pm.sigmap(D), Q);
                        cell->setParam("\\MREG", State::S1);
-                       if (st.ffP->type == "$dff")
+                       if (st.ffM->type == "$dff")
                                cell->setPort("\\CEM", State::S1);
                        //else if (st.ffP->type == "$dffe")
                        //      cell->setPort("\\CEM", st.ffM->getPort("\\EN"));