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(parent:
c196a35
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i965: Extra asserts on flow control instructions to clarify for clang.
author
Eric Anholt
<eric@anholt.net>
Wed, 23 Dec 2009 01:30:13 +0000
(17:30 -0800)
committer
Eric Anholt
<eric@anholt.net>
Sat, 26 Dec 2009 19:18:02 +0000
(11:18 -0800)
src/mesa/drivers/dri/i965/brw_wm_glsl.c
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diff --git
a/src/mesa/drivers/dri/i965/brw_wm_glsl.c
b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
index 43646528f5f0e705c25c291aad3b145c7ba72aca..eccbfd5fa3ae8d0325de344c9f6ba810e93ceeb9 100644
(file)
--- a/
src/mesa/drivers/dri/i965/brw_wm_glsl.c
+++ b/
src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@
-2040,6
+2040,7
@@
static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
if_inst[if_depth++] = brw_IF(p, BRW_EXECUTE_8);
break;
case OPCODE_ELSE:
+ assert(if_depth > 0);
if_inst[if_depth-1] = brw_ELSE(p, if_inst[if_depth-1]);
break;
case OPCODE_ENDIF:
@@
-2095,7
+2096,8
@@
static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
if (intel->is_ironlake)
br = 2;
-
+
+ assert(loop_depth > 0);
loop_depth--;
inst0 = inst1 = brw_WHILE(p, loop_inst[loop_depth]);
/* patch all the BREAK/CONT instructions from last BGNLOOP */