.instructions[1].inst3 = 0x0,
};
+static struct r300_vertex_shader r300_texture_vertex_shader = {
+ /* XXX translate these back into normal instructions */
+ .instruction_count = 2,
+ .instructions[0].inst0 = 0xF00203,
+ .instructions[0].inst1 = 0xD10001,
+ .instructions[0].inst2 = 0x1248001,
+ .instructions[0].inst3 = 0x0,
+ .instructions[1].inst0 = 0xF00203,
+ .instructions[1].inst1 = 0xD10061,
+ .instructions[1].inst2 = 0x1248061,
+ .instructions[1].inst3 = 0x0,
+};
+
void r300_translate_vertex_shader(struct r300_context* r300,
struct r300_vertex_shader* vs);
r300_emit_dsa_state(r300, &dsa_clear_state);
r300_emit_rs_state(r300, &rs_clear_state);
- /* XXX these magic numbers should be explained when
- * this becomes a cached state object */
- if (caps->has_tcl) {
- r300_emit_vertex_shader(r300, &r300_passthrough_vertex_shader);
- } else {
- OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) |
- R300_PVS_NUM_CNTLRS(5) |
- R300_PVS_NUM_FPUS(caps->num_vert_fpus) |
- R300_PVS_VF_MAX_VTX_NUM(12));
- }
-
BEGIN_CS(15);
/* Pixel scissors. */
r300_surface_setup(r300, dest, x, y, w, h);
+ /* Vertex shader setup */
+ if (caps->has_tcl) {
+ r300_emit_vertex_shader(r300, &r300_passthrough_vertex_shader);
+ } else {
+ BEGIN_CS(2);
+ OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) |
+ R300_PVS_NUM_CNTLRS(5) |
+ R300_PVS_NUM_FPUS(caps->num_vert_fpus) |
+ R300_PVS_VF_MAX_VTX_NUM(12));
+ END_CS;
+ }
+
/* Fragment shader setup */
if (caps->is_r500) {
r500_emit_fragment_shader(r300, &r500_passthrough_fragment_shader);
r300_emit_texture(r300, srctex, 0);
r300_flush_textures(r300);
+ /* Vertex shader setup */
+ if (caps->has_tcl) {
+ r300_emit_vertex_shader(r300, &r300_texture_vertex_shader);
+ } else {
+ BEGIN_CS(2);
+ OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) |
+ R300_PVS_NUM_CNTLRS(5) |
+ R300_PVS_NUM_FPUS(caps->num_vert_fpus) |
+ R300_PVS_VF_MAX_VTX_NUM(12));
+ END_CS;
+ }
+
/* Fragment shader setup */
if (caps->is_r500) {
r500_emit_fragment_shader(r300, &r500_texture_fragment_shader);