re PR target/71559 (ICE in ix86_fp_cmp_code_to_pcmp_immediate, at config/i386/i386...

	PR target/71559
	* config/i386/i386.c (ix86_fp_cmp_code_to_pcmp_immediate): Fix up
	returned values and add UN*/LTGT/*ORDERED cases with values matching
	D operand modifier on vcmp for AVX.

	* gcc.target/i386/sse2-pr71559.c: New test.
	* gcc.target/i386/avx-pr71559.c: New test.
	* gcc.target/i386/avx512f-pr71559.c: New test.

From-SVN: r237614

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5d1c60d0bc43e3f94fcc6726a876f1c5e7f1859f..68648a6384ccb20ed48c4dae0b24c0b1865d0583 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2016-06-20  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/71559
+       * config/i386/i386.c (ix86_fp_cmp_code_to_pcmp_immediate): Fix up
+       returned values and add UN*/LTGT/*ORDERED cases with values matching
+       D operand modifier on vcmp for AVX.
+
 2016-06-20  Wilco Dijkstra  <wdijkstr@arm.com>
 
        * config/aarch64/aarch64.opt

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 56a5b9c32962c91a1cda45b8faef3d460d6db87b..91cc0d29a30833c8ffb89e6f0bec4b102a70a9f9 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -23622,17 +23622,33 @@ ix86_fp_cmp_code_to_pcmp_immediate (enum rtx_code code)
   switch (code)
     {
     case EQ:
-      return 0x08;
+      return 0x00;
     case NE:
       return 0x04;
     case GT:
-      return 0x16;
+      return 0x0e;
     case LE:
-      return 0x1a;
+      return 0x02;
     case GE:
-      return 0x15;
+      return 0x0d;
     case LT:
-      return 0x19;
+      return 0x01;
+    case UNLE:
+      return 0x0a;
+    case UNLT:
+      return 0x09;
+    case UNGE:
+      return 0x05;
+    case UNGT:
+      return 0x06;
+    case UNEQ:
+      return 0x18;
+    case LTGT:
+      return 0x0c;
+    case ORDERED:
+      return 0x07;
+    case UNORDERED:
+      return 0x03;
     default:
       gcc_unreachable ();
     }

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d42a9d71e8e68e744c47d009baec4f93689ff5cf..d2963c3fe4a6db55a3a9a209598b494b3d3f69fe 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2016-06-20  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/71559
+       * gcc.target/i386/sse2-pr71559.c: New test.
+       * gcc.target/i386/avx-pr71559.c: New test.
+       * gcc.target/i386/avx512f-pr71559.c: New test.
+
 2016-06-20  Tobias Burnus  <burnus@net-b.de>
 
        PR fortran/71194

diff --git a/gcc/testsuite/gcc.target/i386/avx-pr71559.c b/gcc/testsuite/gcc.target/i386/avx-pr71559.c
new file mode 100644 (file)
index 0000000..af16d56
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx-pr71559.c
@@ -0,0 +1,8 @@
+/* PR target/71559 */
+/* { dg-do run { target avx } } */
+/* { dg-options "-O2 -ftree-vectorize -mavx" } */
+
+#include "avx-check.h"
+#define PR71559_TEST avx_test
+
+#include "sse2-pr71559.c"

diff --git a/gcc/testsuite/gcc.target/i386/avx512f-pr71559.c b/gcc/testsuite/gcc.target/i386/avx512f-pr71559.c
new file mode 100644 (file)
index 0000000..d78d86a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-pr71559.c
@@ -0,0 +1,8 @@
+/* PR target/71559 */
+/* { dg-do run { target avx512f } } */
+/* { dg-options "-O2 -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-check.h"
+#define PR71559_TEST avx512f_test
+
+#include "sse2-pr71559.c"

diff --git a/gcc/testsuite/gcc.target/i386/sse2-pr71559.c b/gcc/testsuite/gcc.target/i386/sse2-pr71559.c
new file mode 100644 (file)
index 0000000..59ecc7f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse2-pr71559.c
@@ -0,0 +1,73 @@
+/* PR target/71559 */
+/* { dg-do run { target sse2 } } */
+/* { dg-options "-O2 -ftree-vectorize -msse2" } */
+
+#ifndef PR71559_TEST
+#include "sse2-check.h"
+#define PR71559_TEST sse2_test
+#endif
+
+#define N 16
+float a[N] = { 5.0f, -3.0f, 1.0f, __builtin_nanf (""), 9.0f, 7.0f, -3.0f, -9.0f,
+               -3.0f, -5.0f, -9.0f, __builtin_nanf (""), 0.5f, -0.5f, 0.0f, 0.0f };
+float b[N] = { -5.0f, 3.0f, 1.0f, 7.0f, 8.0f, 8.0f, -3.0f, __builtin_nanf (""),
+               -4.0f, -4.0f, -9.0f, __builtin_nanf (""), 0.0f, 0.0f, 0.0f, __builtin_nanf ("") };
+int c[N], d[N];
+
+#define FN(name, op) \
+void                                   \
+name (void)                            \
+{                                      \
+  int i;                               \
+  for (i = 0; i < N; i++)              \
+    c[i] = (op || d[i] > 37) ? 5 : 32; \
+}
+FN (eq, a[i] == b[i])
+FN (ne, a[i] != b[i])
+FN (gt, a[i] > b[i])
+FN (ge, a[i] >= b[i])
+FN (lt, a[i] < b[i])
+FN (le, a[i] <= b[i])
+FN (unle, !__builtin_isgreater (a[i], b[i]))
+FN (unlt, !__builtin_isgreaterequal (a[i], b[i]))
+FN (unge, !__builtin_isless (a[i], b[i]))
+FN (ungt, !__builtin_islessequal (a[i], b[i]))
+FN (uneq, !__builtin_islessgreater (a[i], b[i]))
+FN (ordered, !__builtin_isunordered (a[i], b[i]))
+FN (unordered, __builtin_isunordered (a[i], b[i]))
+
+#define TEST(name, GT, LT, EQ, UO) \
+  name ();                             \
+  for (i = 0; i < N; i++)              \
+    {                                  \
+      int v;                           \
+      switch (i % 4)                   \
+       {                               \
+       case 0: v = GT ? 5 : 32; break; \
+       case 1: v = LT ? 5 : 32; break; \
+       case 2: v = EQ ? 5 : 32; break; \
+       case 3: v = UO ? 5 : 32; break; \
+       }                               \
+      if (c[i] != v)                   \
+       __builtin_abort ();             \
+    }
+
+void
+PR71559_TEST (void)
+{
+  int i;
+  asm volatile ("" : : "g" (a), "g" (b), "g" (c), "g" (d) : "memory");
+  TEST (eq, 0, 0, 1, 0)
+  TEST (ne, 1, 1, 0, 1)
+  TEST (gt, 1, 0, 0, 0)
+  TEST (ge, 1, 0, 1, 0)
+  TEST (lt, 0, 1, 0, 0)
+  TEST (le, 0, 1, 1, 0)
+  TEST (unle, 0, 1, 1, 1)
+  TEST (unlt, 0, 1, 0, 1)
+  TEST (unge, 1, 0, 1, 1)
+  TEST (ungt, 1, 0, 0, 1)
+  TEST (uneq, 0, 0, 1, 1)
+  TEST (ordered, 1, 1, 1, 0)
+  TEST (unordered, 0, 0, 0, 1)
+}