ruby: expose access permission to replacement policies

This patch adds support that allows the replacement policy to identify each
cache block's access permission.  This information can be useful when making
replacement decisions.

diff --git a/src/mem/ruby/structures/AbstractReplacementPolicy.hh b/src/mem/ruby/structures/AbstractReplacementPolicy.hh
index d007c98c8c05f84bc6f1bee5f073026ce4575f93..03ef0d2fd122bb7ffee484224676bce4e2c15fa0 100644 (file)
--- a/src/mem/ruby/structures/AbstractReplacementPolicy.hh
+++ b/src/mem/ruby/structures/AbstractReplacementPolicy.hh
@@ -34,6 +34,8 @@
 #include "params/ReplacementPolicy.hh"
 #include "sim/sim_object.hh"
 
+class CacheMemory;
+
 class AbstractReplacementPolicy : public SimObject
 {
   public:
@@ -52,6 +54,9 @@ class AbstractReplacementPolicy : public SimObject
 
     virtual bool useOccupancy() const { return false; }
 
+    void setCache(CacheMemory * pCache) {m_cache = pCache;}
+    CacheMemory * m_cache;
+
   protected:
     unsigned m_num_sets;       /** total number of sets */
     unsigned m_assoc;          /** set associativity */

diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc
index d08724cff17caaf4efa557ca73aff78a398ba800..e444ae09cb2557b8edb080a2376c218bd27a8f60 100644 (file)
--- a/src/mem/ruby/structures/CacheMemory.cc
+++ b/src/mem/ruby/structures/CacheMemory.cc
@@ -63,6 +63,7 @@ CacheMemory::CacheMemory(const Params *p)
     m_latency = p->latency;
     m_cache_assoc = p->assoc;
     m_replacementPolicy_ptr = p->replacement_policy;
+    m_replacementPolicy_ptr->setCache(this);
     m_start_index_bit = p->start_index_bit;
     m_is_instruction_only_cache = p->is_icache;
     m_resource_stalls = p->resourceStalls;
@@ -592,3 +593,15 @@ CacheMemory::checkResourceAvailable(CacheResourceType res, Address addr)
         return true;
     }
 }
+
+bool
+CacheMemory::isBlockInvalid(int64 cache_set, int64 loc)
+{
+  return (m_cache[cache_set][loc]->m_Permission == AccessPermission_Invalid);
+}
+
+bool
+CacheMemory::isBlockNotBusy(int64 cache_set, int64 loc)
+{
+  return (m_cache[cache_set][loc]->m_Permission != AccessPermission_Busy);
+}

diff --git a/src/mem/ruby/structures/CacheMemory.hh b/src/mem/ruby/structures/CacheMemory.hh
index af5e680d8d65079a8b48390115e3dc332f475648..57f2885b6ea81e679283ced2db2731c8c7fc4c83 100644 (file)
--- a/src/mem/ruby/structures/CacheMemory.hh
+++ b/src/mem/ruby/structures/CacheMemory.hh
@@ -100,6 +100,8 @@ class CacheMemory : public SimObject
     Cycles getTagLatency() const { return tagArray.getLatency(); }
     Cycles getDataLatency() const { return dataArray.getLatency(); }
 
+    bool isBlockInvalid(int64 cache_set, int64 loc);
+    bool isBlockNotBusy(int64 cache_set, int64 loc);
 
     // Hook for checkpointing the contents of the cache
     void recordCacheContents(int cntrl, CacheRecorder* tr) const;