i965: Set the alternative floating point mode on gen6 VS and WM.

This matches how we did the math instructions pre-gen6, though it
applies to non-math as well.

Fixes vp1-LIT test 2 (degenerate case: 0 ^ 0 -> 1)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 7f3e4986808b82a04a4002793d0ef96d58736494..b48a30d6be9f8de98a27c41777a8f18aeb5bdb54 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -906,6 +906,8 @@
 # define GEN6_VS_VECTOR_MASK_ENABLE                    (1 << 30)
 # define GEN6_VS_SAMPLER_COUNT_SHIFT                   27
 # define GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT       18
+# define GEN6_VS_FLOATING_POINT_MODE_IEEE_754          (0 << 16)
+# define GEN6_VS_FLOATING_POINT_MODE_ALT               (1 << 16)
 /* DW4 */
 # define GEN6_VS_DISPATCH_START_GRF_SHIFT              20
 # define GEN6_VS_URB_READ_LENGTH_SHIFT                 11
@@ -1048,6 +1050,8 @@
 # define GEN6_WM_VECTOR_MASK_ENABLE                    (1 << 30)
 # define GEN6_WM_SAMPLER_COUNT_SHIFT                   27
 # define GEN6_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT       18
+# define GEN6_WM_FLOATING_POINT_MODE_IEEE_754          (0 << 16)
+# define GEN6_WM_FLOATING_POINT_MODE_ALT               (1 << 16)
 /* DW3: scratch space */
 /* DW4 */
 # define GEN6_WM_STATISTICS_ENABLE                     (1 << 31)

diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.c
index 4ef9e2e6072fd2946c95dc38ce8bee2d58e04a71..ed132bdbd9329d553202a29897801a629b999a02 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen6_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_vs_state.c
@@ -130,6 +130,7 @@ upload_vs_state(struct brw_context *brw)
    OUT_BATCH(CMD_3D_VS_STATE << 16 | (6 - 2));
    OUT_RELOC(brw->vs.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
    OUT_BATCH((0 << GEN6_VS_SAMPLER_COUNT_SHIFT) |
+            GEN6_VS_FLOATING_POINT_MODE_ALT |
             (brw->vs.nr_surfaces << GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
    OUT_BATCH(0); /* scratch space base offset */
    OUT_BATCH((1 << GEN6_VS_DISPATCH_START_GRF_SHIFT) |

diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index d80df4e254be5e7d6343629ea946129197983952..2ae0c093ebe6a07a49d7b233a48e19292b7c683d 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -133,6 +133,9 @@ upload_wm_state(struct brw_context *brw)
    dw5 |= GEN6_WM_LINE_AA_WIDTH_1_0;
    dw5 |= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5;
 
+   /* OpenGL non-ieee floating point mode */
+   dw2 |= GEN6_WM_FLOATING_POINT_MODE_ALT;
+
    /* BRW_NEW_NR_WM_SURFACES */
    dw2 |= brw->wm.nr_surfaces << GEN6_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT;