iris_fill_cs_push_const_buffer(struct brw_cs_prog_data *cs_prog_data,
uint32_t *dst)
{
- assert(cs_prog_data->push.total.size > 0);
+ assert(brw_cs_push_const_total_size(cs_prog_data, cs_prog_data->threads) > 0);
assert(cs_prog_data->push.cross_thread.size == 0);
assert(cs_prog_data->push.per_thread.dwords == 1);
assert(cs_prog_data->base.param[0] == BRW_PARAM_BUILTIN_SUBGROUP_ID);
assert(cs_prog_data->push.cross_thread.dwords == 0 &&
cs_prog_data->push.per_thread.dwords == 1 &&
cs_prog_data->base.param[0] == BRW_PARAM_BUILTIN_SUBGROUP_ID);
+ const unsigned push_const_size =
+ brw_cs_push_const_total_size(cs_prog_data, cs_prog_data->threads);
uint32_t *curbe_data_map =
stream_state(batch, ice->state.dynamic_uploader,
&ice->state.last_res.cs_thread_ids,
- ALIGN(cs_prog_data->push.total.size, 64), 64,
+ ALIGN(push_const_size, 64), 64,
&curbe_data_offset);
assert(curbe_data_map);
- memset(curbe_data_map, 0x5a, ALIGN(cs_prog_data->push.total.size, 64));
+ memset(curbe_data_map, 0x5a, ALIGN(push_const_size, 64));
iris_fill_cs_push_const_buffer(cs_prog_data, curbe_data_map);
iris_emit_cmd(batch, GENX(MEDIA_CURBE_LOAD), curbe) {
- curbe.CURBETotalDataLength =
- ALIGN(cs_prog_data->push.total.size, 64);
+ curbe.CURBETotalDataLength = ALIGN(push_const_size, 64);
curbe.CURBEDataStartAddress = curbe_data_offset;
}
}
struct {
struct brw_push_const_block cross_thread;
struct brw_push_const_block per_thread;
- struct brw_push_const_block total;
} push;
struct {
return slm_size;
}
+unsigned
+brw_cs_push_const_total_size(const struct brw_cs_prog_data *cs_prog_data,
+ unsigned threads);
+
/**
* Return true if the given shader stage is dispatched contiguously by the
* relevant fixed function starting from channel 0 of the SIMD thread, which
return reg;
}
+unsigned
+brw_cs_push_const_total_size(const struct brw_cs_prog_data *cs_prog_data,
+ unsigned threads)
+{
+ assert(cs_prog_data->push.per_thread.size % REG_SIZE == 0);
+ assert(cs_prog_data->push.cross_thread.size % REG_SIZE == 0);
+ return cs_prog_data->push.per_thread.size * threads +
+ cs_prog_data->push.cross_thread.size;
+}
+
static void
fill_push_const_block_info(struct brw_push_const_block *block, unsigned dwords)
{
fill_push_const_block_info(&cs_prog_data->push.cross_thread, cross_thread_dwords);
fill_push_const_block_info(&cs_prog_data->push.per_thread, per_thread_dwords);
- unsigned total_dwords =
- (cs_prog_data->push.per_thread.size * cs_prog_data->threads +
- cs_prog_data->push.cross_thread.size) / 4;
- fill_push_const_block_info(&cs_prog_data->push.total, total_dwords);
-
assert(cs_prog_data->push.cross_thread.dwords % 8 == 0 ||
cs_prog_data->push.per_thread.size == 0);
assert(cs_prog_data->push.cross_thread.dwords +
const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
const struct anv_push_range *range = &pipeline->cs->bind_map.push_ranges[0];
- if (cs_prog_data->push.total.size == 0)
+ const unsigned total_push_constants_size =
+ brw_cs_push_const_total_size(cs_prog_data, cs_prog_data->threads);
+ if (total_push_constants_size == 0)
return (struct anv_state) { .offset = 0 };
const unsigned push_constant_alignment =
cmd_buffer->device->info.gen < 8 ? 32 : 64;
const unsigned aligned_total_push_constants_size =
- ALIGN(cs_prog_data->push.total.size, push_constant_alignment);
+ ALIGN(total_push_constants_size, push_constant_alignment);
struct anv_state state =
anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
aligned_total_push_constants_size,
/* XXX: Should this happen somewhere before to get our state flag set? */
_mesa_load_state_parameters(ctx, prog->Parameters);
- if (cs_prog_data->push.total.size == 0) {
+ const unsigned push_const_size =
+ brw_cs_push_const_total_size(cs_prog_data, cs_prog_data->threads);
+ if (push_const_size == 0) {
stage_state->push_const_size = 0;
return;
}
uint32_t *param =
- brw_state_batch(brw, ALIGN(cs_prog_data->push.total.size, 64),
+ brw_state_batch(brw, ALIGN(push_const_size, 64),
64, &stage_state->push_const_offset);
assert(param);
vfe.CURBEAllocationSize = vfe_curbe_allocation;
}
- if (cs_prog_data->push.total.size > 0) {
+ const unsigned push_const_size =
+ brw_cs_push_const_total_size(cs_prog_data, cs_prog_data->threads);
+ if (push_const_size > 0) {
brw_batch_emit(brw, GENX(MEDIA_CURBE_LOAD), curbe) {
- curbe.CURBETotalDataLength =
- ALIGN(cs_prog_data->push.total.size, 64);
+ curbe.CURBETotalDataLength = ALIGN(push_const_size, 64);
curbe.CURBEDataStartAddress = stage_state->push_const_offset;
}
}