radeonsi: Fix anisotropic filtering state setup
authorMichel Dänzer <michel.daenzer@amd.com>
Wed, 14 May 2014 07:30:33 +0000 (16:30 +0900)
committerMichel Dänzer <michel@daenzer.net>
Wed, 14 May 2014 13:53:30 +0000 (22:53 +0900)
Bring it back in line with r600g. I broke this in the original radeonsi
bringup. :(

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78537

Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
src/gallium/drivers/r600/r600_pipe.h
src/gallium/drivers/radeon/r600_pipe_common.h
src/gallium/drivers/radeonsi/si_state.c

index 952b6bded8d560e251e9ed0c7e2fcf1ca9968551..41203597e7fbb4026c7e32969b41d2a61608fa40 100644 (file)
@@ -829,15 +829,6 @@ static INLINE uint32_t S_FIXED(float value, uint32_t frac_bits)
 }
 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
 
-static inline unsigned r600_tex_aniso_filter(unsigned filter)
-{
-       if (filter <= 1)   return 0;
-       if (filter <= 2)   return 1;
-       if (filter <= 4)   return 2;
-       if (filter <= 8)   return 3;
-        /* else */        return 4;
-}
-
 /* 12.4 fixed-point */
 static INLINE unsigned r600_pack_float_12p4(float x)
 {
index ada124f93edada0b15318feae537c37cd5656e65..bbfcdf95709a6733f63a43da7f30cba7cf464702 100644 (file)
@@ -489,6 +489,15 @@ r600_resource_reference(struct r600_resource **ptr, struct r600_resource *res)
                                (struct pipe_resource *)res);
 }
 
+static inline unsigned r600_tex_aniso_filter(unsigned filter)
+{
+       if (filter <= 1)   return 0;
+       if (filter <= 2)   return 1;
+       if (filter <= 4)   return 2;
+       if (filter <= 8)   return 3;
+        /* else */        return 4;
+}
+
 #define R600_ERR(fmt, args...) \
        fprintf(stderr, "EE %s:%d %s - "fmt, __FILE__, __LINE__, __func__, ##args)
 
index a98be24897b405d32515812e449e9c81e9f74431..e3b72c25c31847a5a8da0b48f5f49155a3ec1163 100644 (file)
@@ -2601,16 +2601,15 @@ static void *si_create_sampler_state(struct pipe_context *ctx,
        rstate->val[0] = (S_008F30_CLAMP_X(si_tex_wrap(state->wrap_s)) |
                          S_008F30_CLAMP_Y(si_tex_wrap(state->wrap_t)) |
                          S_008F30_CLAMP_Z(si_tex_wrap(state->wrap_r)) |
-                         (state->max_anisotropy & 0x7) << 9 | /* XXX */
+                         r600_tex_aniso_filter(state->max_anisotropy) << 9 |
                          S_008F30_DEPTH_COMPARE_FUNC(si_tex_compare(state->compare_func)) |
                          S_008F30_FORCE_UNNORMALIZED(!state->normalized_coords) |
-                         aniso_flag_offset << 16 | /* XXX */
                          S_008F30_DISABLE_CUBE_WRAP(!state->seamless_cube_map));
        rstate->val[1] = (S_008F34_MIN_LOD(S_FIXED(CLAMP(state->min_lod, 0, 15), 8)) |
                          S_008F34_MAX_LOD(S_FIXED(CLAMP(state->max_lod, 0, 15), 8)));
        rstate->val[2] = (S_008F38_LOD_BIAS(S_FIXED(CLAMP(state->lod_bias, -16, 16), 8)) |
-                         S_008F38_XY_MAG_FILTER(si_tex_filter(state->mag_img_filter)) |
-                         S_008F38_XY_MIN_FILTER(si_tex_filter(state->min_img_filter)) |
+                         S_008F38_XY_MAG_FILTER(si_tex_filter(state->mag_img_filter) | aniso_flag_offset) |
+                         S_008F38_XY_MIN_FILTER(si_tex_filter(state->min_img_filter) | aniso_flag_offset) |
                          S_008F38_MIP_FILTER(si_tex_mipfilter(state->min_mip_filter)));
        rstate->val[3] = S_008F3C_BORDER_COLOR_TYPE(border_color_type);