invert table order in remap.mwdn (keep bitpositions)

diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index 103bd80354e17c2541483f76e6a5f2401c93dafe..3fa8dc722df04d59b9ee05554eae33bbb77fcb34 100644 (file)
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -593,15 +593,15 @@ which have the same format.
 Shape is 32-bits.  When SHAPE is set entirely to zeros, remapping is
 disabled: the register's elements are a linear (1D) vector.
 
-|31.30|29..28 |27..24| 23..21 | 20..18  | 17..12  |11..6 |5..0  | Mode  |
-|---- |------ |------| ------ | ------- | ------- |----- |----- | ----- |
-|mode |skip   |offset| invxyz | permute | zdimsz  |ydimsz|xdimsz|Matrix |
-|0b00 |elwidth|offset|sk1/invxy|0b110/0b111|SVGPR|ydimsz|xdimsz|Indexed|
-|0b01 |submode|offset| invxyz | submode2| zdimsz  |mode  |xdimsz|DCT/FFT|
-|0b10 |submode|offset| invxyz | rsvd    | rsvd    |rsvd  |xdimsz|Preduce|
-|0b11 |       |      |        |         |         |      |      |rsvd   |
-
-mode sets different behaviours (straight matrix multiply, FFT, DCT).
+|0:5   |6:11  | 12:17   | 18:20   | 21:23   |24:27 |28:29  |30:31| Mode  |
+|----- |----- | ------- | ------- | ------  |------|------ |---- | ----- |
+|xdimsz|ydimsz| zdimsz  | permute | invxyz  |offset|skip   |mode |Matrix |
+|xdimsz|ydimsz|SVGPR    | 11/     |sk1/invxy|offset|elwidth|0b00 |Indexed|
+|xdimsz|mode  | zdimsz  | submode2| invxyz  |offset|submode|0b01 |DCT/FFT|
+| rsvd |rsvd  |xdimsz   | rsvd    | invxyz  |offset|submode|0b10 |Preduce|
+|      |      |         |         |         |      |       |0b11 |rsvd   |
+
+`mode` sets different behaviours (straight matrix multiply, FFT, DCT).
 
 * **mode=0b00** sets straight Matrix Mode
 * **mode=0b00** with permute=0b110 or 0b111 sets Indexed Mode