* cpu.h (TRACE_COND_BR): Use TRACE_BRANCH_P, not TRACE_ALU_P.

diff --git a/sim/tic80/ChangeLog b/sim/tic80/ChangeLog
index e7c56d6bd4378acd66bbb287c6b1979eaee22336..2f2b05692bd9cdfdb612c90e20be1773461f8274 100644 (file)
--- a/sim/tic80/ChangeLog
+++ b/sim/tic80/ChangeLog
@@ -1,3 +1,7 @@
+Mon Nov 24 14:57:58 1997  Doug Evans  <devans@seba.cygnus.com>
+
+       * cpu.h (TRACE_COND_BR): Use TRACE_BRANCH_P, not TRACE_ALU_P.
+
 Sat Nov 22 21:42:09 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 
        * interp.c (engine_step): Replace SIGTRAP with SIM_SIGTRAP.

diff --git a/sim/tic80/cpu.h b/sim/tic80/cpu.h
index e710364d0d1410bfb855549c0ea73f2896861b89..f1780fa931695c31fafb645a7875596ec2347304 100644 (file)
--- a/sim/tic80/cpu.h
+++ b/sim/tic80/cpu.h
@@ -283,7 +283,7 @@ do {                                                                        \
 
 #define TRACE_UCOND_BR(indx, target)                                   \
 do {                                                                   \
-  if (TRACE_ALU_P (CPU)) {                                             \
+  if (TRACE_BRANCH_P (CPU)) {                                          \
     trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file,             \
                    itable[indx].line_nr, "branch",                     \
                    tic80_trace_ucond_br (indx, target));               \