re PR target/65660 (252.eon regression on bdver2 with -Ofast)

2015-04-13  Richard Biener  <rguenther@suse.de>

	PR target/65660
	* config/i386/i386.c (bdver1_cost): Double cond_taken_branch_cost
	and cond_not_taken_branch_cost to 4 and 2.
	(bdver2_cost): Likewise.
	(bdver3_cost): Likewise.
	(bdver4_cost): Likewise.

From-SVN: r222040

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0d3495fd0bdf12951c87716df3b78f0c96dcc247..e81d6da95913119072179589103968218adaeb54 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2015-04-13  Richard Biener  <rguenther@suse.de>
+
+       PR target/65660
+       * config/i386/i386.c (bdver1_cost): Double cond_taken_branch_cost
+       and cond_not_taken_branch_cost to 4 and 2.
+       (bdver2_cost): Likewise.
+       (bdver3_cost): Likewise.
+       (bdver4_cost): Likewise.
+
 2015-04-12  Jan Hubicka  <hubicka@ucw.cz>
 
        * hash-table.h (hash_table constructor): Add mem stats.

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index b442da9802e01b729caa022707e999b246b47204..3263656eef30ca32b749142bdcefb2aa7eb4d24e 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -1025,8 +1025,8 @@ const struct processor_costs bdver1_cost = {
   4,                                   /* vec_align_load_cost.  */
   4,                                   /* vec_unalign_load_cost.  */
   4,                                   /* vec_store_cost.  */
-  2,                                   /* cond_taken_branch_cost.  */
-  1,                                   /* cond_not_taken_branch_cost.  */
+  4,                                   /* cond_taken_branch_cost.  */
+  2,                                   /* cond_not_taken_branch_cost.  */
 };
 
 /*  BDVER2 has optimized REP instruction for medium sized blocks, but for
@@ -1121,8 +1121,8 @@ const struct processor_costs bdver2_cost = {
   4,                                   /* vec_align_load_cost.  */
   4,                                   /* vec_unalign_load_cost.  */
   4,                                   /* vec_store_cost.  */
-  2,                                   /* cond_taken_branch_cost.  */
-  1,                                   /* cond_not_taken_branch_cost.  */
+  4,                                   /* cond_taken_branch_cost.  */
+  2,                                   /* cond_not_taken_branch_cost.  */
 };
 
 
@@ -1208,8 +1208,8 @@ struct processor_costs bdver3_cost = {
   4,                                   /* vec_align_load_cost.  */
   4,                                   /* vec_unalign_load_cost.  */
   4,                                   /* vec_store_cost.  */
-  2,                                   /* cond_taken_branch_cost.  */
-  1,                                   /* cond_not_taken_branch_cost.  */
+  4,                                   /* cond_taken_branch_cost.  */
+  2,                                   /* cond_not_taken_branch_cost.  */
 };
 
 /*  BDVER4 has optimized REP instruction for medium sized blocks, but for
@@ -1294,8 +1294,8 @@ struct processor_costs bdver4_cost = {
   4,                                   /* vec_align_load_cost.  */
   4,                                   /* vec_unalign_load_cost.  */
   4,                                   /* vec_store_cost.  */
-  2,                                   /* cond_taken_branch_cost.  */
-  1,                                   /* cond_not_taken_branch_cost.  */
+  4,                                   /* cond_taken_branch_cost.  */
+  2,                                   /* cond_not_taken_branch_cost.  */
 };
 
   /* BTVER1 has optimized REP instruction for medium sized blocks, but for