r600g: Fix location for clip plane registers
authorOwen W. Taylor <otaylor@fishsoup.net>
Sat, 20 Nov 2010 17:18:56 +0000 (12:18 -0500)
committerAlex Deucher <alexdeucher@gmail.com>
Sat, 20 Nov 2010 17:18:56 +0000 (12:18 -0500)
The stride between the different clip plane registers was incorrect.

https://bugs.freedesktop.org/show_bug.cgi?id=31788

agd5f: fix evergreen as well.

src/gallium/drivers/r600/evergreen_state.c
src/gallium/drivers/r600/r600_state.c

index 8558e3b559a6d27b31818fd545ab6cd0e528cdc9..26dad7b65c07ccfaa5ee36c690262c59071425df 100644 (file)
@@ -501,16 +501,16 @@ static void evergreen_set_clip_state(struct pipe_context *ctx,
        rstate->id = R600_PIPE_STATE_CLIP;
        for (int i = 0; i < state->nr; i++) {
                r600_pipe_state_add_reg(rstate,
-                                       R_0285BC_PA_CL_UCP0_X + i * 4,
+                                       R_0285BC_PA_CL_UCP0_X + i * 16,
                                        fui(state->ucp[i][0]), 0xFFFFFFFF, NULL);
                r600_pipe_state_add_reg(rstate,
-                                       R_0285C0_PA_CL_UCP0_Y + i * 4,
+                                       R_0285C0_PA_CL_UCP0_Y + i * 16,
                                        fui(state->ucp[i][1]) , 0xFFFFFFFF, NULL);
                r600_pipe_state_add_reg(rstate,
-                                       R_0285C4_PA_CL_UCP0_Z + i * 4,
+                                       R_0285C4_PA_CL_UCP0_Z + i * 16,
                                        fui(state->ucp[i][2]), 0xFFFFFFFF, NULL);
                r600_pipe_state_add_reg(rstate,
-                                       R_0285C8_PA_CL_UCP0_W + i * 4,
+                                       R_0285C8_PA_CL_UCP0_W + i * 16,
                                        fui(state->ucp[i][3]), 0xFFFFFFFF, NULL);
        }
        r600_pipe_state_add_reg(rstate, R_028810_PA_CL_CLIP_CNTL,
index 6fd46ae7e69f14b79397d1fb48ca369169548a5a..bf4ca057d287f5cd7ec32fea1491ca78e607fbb6 100644 (file)
@@ -692,16 +692,16 @@ static void r600_set_clip_state(struct pipe_context *ctx,
        rstate->id = R600_PIPE_STATE_CLIP;
        for (int i = 0; i < state->nr; i++) {
                r600_pipe_state_add_reg(rstate,
-                                       R_028E20_PA_CL_UCP0_X + i * 4,
+                                       R_028E20_PA_CL_UCP0_X + i * 16,
                                        fui(state->ucp[i][0]), 0xFFFFFFFF, NULL);
                r600_pipe_state_add_reg(rstate,
-                                       R_028E24_PA_CL_UCP0_Y + i * 4,
+                                       R_028E24_PA_CL_UCP0_Y + i * 16,
                                        fui(state->ucp[i][1]) , 0xFFFFFFFF, NULL);
                r600_pipe_state_add_reg(rstate,
-                                       R_028E28_PA_CL_UCP0_Z + i * 4,
+                                       R_028E28_PA_CL_UCP0_Z + i * 16,
                                        fui(state->ucp[i][2]), 0xFFFFFFFF, NULL);
                r600_pipe_state_add_reg(rstate,
-                                       R_028E2C_PA_CL_UCP0_W + i * 4,
+                                       R_028E2C_PA_CL_UCP0_W + i * 16,
                                        fui(state->ucp[i][3]), 0xFFFFFFFF, NULL);
        }
        r600_pipe_state_add_reg(rstate, R_028810_PA_CL_CLIP_CNTL,